[Skiboot] [PATCH v2 05/15] hw/npu2: Simplify npu2_write_bar()

[Andrew Donnellan]

Now that we've moved most of the BAR assignment code into common code and
we have an existing struct npu2 everywhere we need it, we don't need the
gcid and scom parameters to npu2_write_bar() any more.

Signed-off-by: Andrew Donnellan <andrew.donnellan at au1.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat at linux.ibm.com>

---
v1->v2:
- afu config bar enablement is in separate function
---
 hw/npu2-common.c   | 14 +++++---------
 hw/npu2-opencapi.c |  5 ++---
 hw/npu2.c          |  6 +++---
 include/npu2.h     |  3 +--
 4 files changed, 11 insertions(+), 17 deletions(-)

diff --git a/hw/npu2-common.c b/hw/npu2-common.c
index 944719d2489a..90c7f0ac4d5d 100644
--- a/hw/npu2-common.c
+++ b/hw/npu2-common.c
@@ -141,8 +141,7 @@ void npu2_read_bar(struct npu2 *p, struct npu2_bar *bar)
 	}
 }
 
-void npu2_write_bar(struct npu2 *p, struct npu2_bar *bar, uint32_t gcid,
-		    uint32_t scom)
+void npu2_write_bar(struct npu2 *p, struct npu2_bar *bar)
 {
 	uint64_t reg, val;
 	int block;
@@ -168,10 +167,7 @@ void npu2_write_bar(struct npu2 *p, struct npu2_bar *bar, uint32_t gcid,
 
 	for (block = NPU2_BLOCK_SM_0; block <= NPU2_BLOCK_SM_3; block++) {
 		reg = NPU2_REG_OFFSET(0, block, bar->reg);
-		if (p)
-			npu2_write(p, reg, val);
-		else
-			npu2_scom_write(gcid, scom, reg, NPU2_MISC_DA_LEN_8B, val);
+		npu2_write(p, reg, val);
 	}
 }
 
@@ -200,7 +196,7 @@ static void assign_bars(struct npu2 *npu)
 	for (i = 0; i < ARRAY_SIZE(phy_bars); i++) {
 		bar = &phy_bars[i];
 		npu2_get_bar(npu->chip_id, bar);
-		npu2_write_bar(npu, bar, npu->chip_id, npu->xscom_base);
+		npu2_write_bar(npu, bar);
 	}
 
 	/* Device BARs */
@@ -221,7 +217,7 @@ static void assign_bars(struct npu2 *npu)
 					   NPU2_NTL0_BAR : NPU2_NTL1_BAR);
 		bar->flags = PCI_CFG_BAR_TYPE_MEM | PCI_CFG_BAR_MEM64;
 		npu2_get_bar(npu->chip_id, bar);
-		npu2_write_bar(npu, bar, npu->chip_id, npu->xscom_base);
+		npu2_write_bar(npu, bar);
 
 		/* GENID BAR */
 		bar = &dev->genid_bar;
@@ -236,7 +232,7 @@ static void assign_bars(struct npu2 *npu)
 			if (NPU2DEV_BRICK(dev))
 				bar->base += 0x10000;
 		}
-		npu2_write_bar(npu, bar, npu->chip_id, npu->xscom_base);
+		npu2_write_bar(npu, bar);
 	};
 
 	/* Global MMIO BAR */
diff --git a/hw/npu2-opencapi.c b/hw/npu2-opencapi.c
index 17a16be00eba..2a319979eccc 100644
--- a/hw/npu2-opencapi.c
+++ b/hw/npu2-opencapi.c
@@ -742,7 +742,7 @@ static void setup_afu_mmio_bars(uint32_t gcid, uint32_t scom_base,
 
 	prlog(PR_DEBUG, "OCAPI: %s: Setup AFU MMIO BARs\n", __func__);
 	dev->ntl_bar.enabled = true;
-	npu2_write_bar(dev->npu, &dev->ntl_bar, gcid, scom_base);
+	npu2_write_bar(dev->npu, &dev->ntl_bar);
 
 	reg = SETFIELD(NPU2_CQ_CTL_MISC_MMIOPA_ADDR, 0ull, dev->ntl_bar.base >> 16);
 	reg = SETFIELD(NPU2_CQ_CTL_MISC_MMIOPA_SIZE, reg, ilog2(dev->ntl_bar.size >> 16));
@@ -758,8 +758,7 @@ static void setup_afu_config_bars(struct npu2_dev *dev)
 {
 	prlog(PR_DEBUG, "OCAPI: %s: Setup AFU Config BARs\n", __func__);
 	dev->genid_bar.enabled = true;
-	npu2_write_bar(dev->npu, &dev->genid_bar, dev->npu->chip_id,
-		       dev->npu->xscom_base);
+	npu2_write_bar(dev->npu, &dev->genid_bar);
 }
 
 static void otl_enabletx(uint32_t gcid, uint32_t scom_base,
diff --git a/hw/npu2.c b/hw/npu2.c
index b920edef3265..1c7af14958e8 100644
--- a/hw/npu2.c
+++ b/hw/npu2.c
@@ -131,7 +131,7 @@ static int64_t npu2_cfg_write_cmd(void *dev,
 	enabled = !!(*data & PCI_CFG_CMD_MEM_EN);
 
 	ndev->ntl_bar.enabled = enabled;
-	npu2_write_bar(ndev->npu, &ndev->ntl_bar, 0, 0);
+	npu2_write_bar(ndev->npu, &ndev->ntl_bar);
 
 	/*
 	 * Enable/disable the GENID BAR. Two bricks share one GENID
@@ -146,7 +146,7 @@ static int64_t npu2_cfg_write_cmd(void *dev,
 	/* Enable the BAR if either device requests it enabled, otherwise disable it */
 	ndev->genid_bar.enabled = ndev->genid_bar.enabled0 ||
 		ndev->genid_bar.enabled1;
-	npu2_write_bar(ndev->npu, &ndev->genid_bar, 0, 0);
+	npu2_write_bar(ndev->npu, &ndev->genid_bar);
 
 	return OPAL_PARTIAL;
 }
@@ -216,7 +216,7 @@ static int64_t npu2_cfg_write_bar(struct npu2_dev *dev,
 			return OPAL_HARDWARE;
 		}
 
-		npu2_write_bar(dev->npu, bar, 0, 0);
+		npu2_write_bar(dev->npu, bar);
 	}
 
 	/* To update the config cache */
diff --git a/include/npu2.h b/include/npu2.h
index 31d9a4a1053f..8d739d8d5659 100644
--- a/include/npu2.h
+++ b/include/npu2.h
@@ -208,8 +208,7 @@ void npu2_write_mask(struct npu2 *p, uint64_t reg, uint64_t val, uint64_t mask);
 void npu2_write_mask_4b(struct npu2 *p, uint64_t reg, uint32_t val, uint32_t mask);
 void npu2_get_bar(uint32_t gcid, struct npu2_bar *bar);
 void npu2_read_bar(struct npu2 *p, struct npu2_bar *bar);
-void npu2_write_bar(struct npu2 *p, struct npu2_bar *bar, uint32_t gcid,
-		    uint32_t scom);
+void npu2_write_bar(struct npu2 *p, struct npu2_bar *bar);
 int64_t npu2_dev_procedure(void *dev, struct pci_cfg_reg_filter *pcrf,
 			   uint32_t offset, uint32_t len, uint32_t *data,
 			   bool write);
-- 
git-series 0.9.1