[Skiboot] [PATCH 3/9] npu2: Remove unused npu2::bdf2pe_cache

[Reza Arbab]

This cache is written but never read. Wiring it up would gain us little
(except added complexity), and it obviously hasn't been missed thus far,
so remove it altogether.

Signed-off-by: Reza Arbab <arbab at linux.ibm.com>
---
 hw/npu2-opencapi.c |  1 -
 hw/npu2.c          | 30 ------------------------------
 include/npu2.h     |  1 -
 3 files changed, 32 deletions(-)

diff --git a/hw/npu2-opencapi.c b/hw/npu2-opencapi.c
index 65f623c..8075d4e 100644
--- a/hw/npu2-opencapi.c
+++ b/hw/npu2-opencapi.c
@@ -1447,7 +1447,6 @@ static int64_t npu2_opencapi_set_pe(struct phb *phb,
 	reg = NPU2_REG_OFFSET(NPU2_STACK_MISC, NPU2_BLOCK_MISC,
 			      NPU2_MISC_BRICK0_BDF2PE_MAP0 +
 			      (dev->brick_index * 0x18));
-	p->bdf2pe_cache[dev->brick_index] = val;
 	npu2_write(p, reg, val);
 
 	return OPAL_SUCCESS;
diff --git a/hw/npu2.c b/hw/npu2.c
index aa8a642..8d5b2f3 100644
--- a/hw/npu2.c
+++ b/hw/npu2.c
@@ -883,35 +883,6 @@ static void npu2_phb_final_fixup(struct phb *phb)
 
 static void npu2_init_ioda_cache(struct npu2 *p)
 {
-	uint64_t val[2];
-	uint32_t i;
-
-	/*
-	 * PE mapping: there are two sets of registers. One of them
-	 * is used to map PEs for transactions. Another set is used
-	 * for error routing. We should have consistent setting in
-	 * both of them. Note that each brick can support 3 PEs at
-	 * the maximal degree. For now, we just support one PE per
-	 * brick.
-	 */
-	val[0] = NPU2_CQ_BRICK_BDF2PE_MAP_ENABLE;
-	val[0] = SETFIELD(NPU2_CQ_BRICK_BDF2PE_MAP_PE,
-			  val[0], NPU2_RESERVED_PE_NUM);
-	val[1] = NPU2_MISC_BRICK_BDF2PE_MAP_ENABLE;
-	val[1] = SETFIELD(NPU2_MISC_BRICK_BDF2PE_MAP_PE,
-			  val[1], NPU2_RESERVED_PE_NUM);
-	for (i = 0; i < ARRAY_SIZE(p->bdf2pe_cache); i++) {
-		if (i < ARRAY_SIZE(p->bdf2pe_cache))
-			p->bdf2pe_cache[i] = SETFIELD(NPU2_CQ_BRICK_BDF2PE_MAP_BDF,
-						      val[0], i / 3);
-		else
-			p->bdf2pe_cache[i] = SETFIELD(NPU2_MISC_BRICK_BDF2PE_MAP_BDF,
-						      val[1], i / 3);
-
-		if (i % 3)
-			p->bdf2pe_cache[i] = 0ul;
-	}
-
 	/* TVT */
 	memset(p->tve_cache, 0, sizeof(p->tve_cache));
 }
@@ -1220,7 +1191,6 @@ static int64_t npu2_set_pe(struct phb *phb,
 	val = SETFIELD(NPU2_MISC_BRICK_BDF2PE_MAP_BDF, val, dev->nvlink.gpu_bdfn);
 	reg = NPU2_REG_OFFSET(NPU2_STACK_MISC, NPU2_BLOCK_MISC,
 			      NPU2_MISC_BRICK0_BDF2PE_MAP0 + (dev->brick_index * 0x18));
-	p->bdf2pe_cache[dev->brick_index] = val;
 	npu2_write(p, reg, val);
 
 	return OPAL_SUCCESS;
diff --git a/include/npu2.h b/include/npu2.h
index 1de963d..af4ff68 100644
--- a/include/npu2.h
+++ b/include/npu2.h
@@ -165,7 +165,6 @@ struct npu2 {
 
 	/* IODA cache */
 	uint64_t	lxive_cache[8];
-	uint64_t	bdf2pe_cache[36];
 	uint64_t	tve_cache[16];
 	bool		tx_zcal_complete[2];
 
-- 
1.8.3.1