[Skiboot] [PATCH 07/16] core: hardcode P9 large decrementer width

Oliver oohall at gmail.com
Mon Feb 11 15:26:49 AEDT 2019


On Mon, Feb 11, 2019 at 3:12 PM Stewart Smith <stewart at linux.ibm.com> wrote:
>
> Nicholas Piggin <npiggin at gmail.com> writes:
> > There is no good reason to "discover" the large decremeter width.
> > We are firmware, we know the large decrementer width.
> >
> > Signed-off-by: Nicholas Piggin <npiggin at gmail.com>
>
> Oliver - do you remember the original motivation around detecting it
> rather than just coding how many bits there were? Was it because we were
> experimenting with things in sim before the HW design was finalised? Or
> are we just being fancy?

Dunno. I'm pretty sure this was one of the first bits of skiboot code
I wrote so either,

a) I was overthinking it, or
b) Mikey told me to.

I do remember having to get some mambo bugs fixed to test it though.
So it's possible the actual size wasn't finalised yet.

Oliver

>
> > ---
> >  core/cpu.c | 43 +++++++------------------------------------
> >  1 file changed, 7 insertions(+), 36 deletions(-)
> >
> > diff --git a/core/cpu.c b/core/cpu.c
> > index 5d933bf5c..e7ffe3003 100644
> > --- a/core/cpu.c
> > +++ b/core/cpu.c
> > @@ -1044,48 +1044,19 @@ void init_boot_cpu(void)
> >       init_hid();
> >  }
> >
> > -static void enable_large_dec(bool on)
> > -{
> > -     u64 lpcr = mfspr(SPR_LPCR);
> > -
> > -     if (on)
> > -             lpcr |= SPR_LPCR_P9_LD;
> > -     else
> > -             lpcr &= ~SPR_LPCR_P9_LD;
> > -
> > -     mtspr(SPR_LPCR, lpcr);
> > -     isync();
> > -}
> > -
> > -#define HIGH_BIT (1ull << 63)
> > -
> >  static int find_dec_bits(void)
> >  {
> > -     int bits = 65; /* we always decrement once */
> > -     u64 mask = ~0ull;
> > +     int bits;
> >
> >       if (proc_gen < proc_gen_p9)
> > -             return 32;
> > -
> > -     /* The ISA doesn't specify the width of the decrementer register so we
> > -      * need to discover it. When in large mode (LPCR.LD = 1) reads from the
> > -      * DEC SPR are sign extended to 64 bits and writes are truncated to the
> > -      * physical register width. We can use this behaviour to detect the
> > -      * width by starting from an all 1s value and left shifting until we
> > -      * read a value from the DEC with it's high bit cleared.
> > -      */
> > -
> > -     enable_large_dec(true);
> > -
> > -     do {
> > -             bits--;
> > -             mask = mask >> 1;
> > -             mtspr(SPR_DEC, mask);
> > -     } while (mfspr(SPR_DEC) & HIGH_BIT);
> > -
> > -     enable_large_dec(false);
> > +             bits = 32;
> > +     else if (proc_gen == proc_gen_p9)
> > +             bits = 56;
> > +     else
> > +             assert(0);
> >
> >       prlog(PR_DEBUG, "CPU: decrementer bits %d\n", bits);
> > +
> >       return bits;
> >  }
> >
> > --
> > 2.18.0
> >
> > _______________________________________________
> > Skiboot mailing list
> > Skiboot at lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/skiboot
> >
>
> --
> Stewart Smith
> OPAL Architect, IBM.
>


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