[Skiboot] [PATCH v3 4/5] phb4: Eliminate peltv_cache

Oliver O'Halloran oohall at gmail.com
Fri Feb 1 14:57:45 AEDT 2019


The PELT-V is also an in-memory table and there is no reason to have two
copies of it. Removing the cache shaves another 128KB off the size of
each struct phb4.

Reviewed-by: Andrew Donnellan <andrew.donnellan at au1.ibm.com>
Signed-off-by: Oliver O'Halloran <oohall at gmail.com>
--
v3: Moved line from previous patch into this one
v2: Moved PELTV reset into phb4_init_ioda_cache()
---
 hw/phb4.c      | 30 ++++++++++++------------------
 include/phb4.h |  3 +--
 2 files changed, 13 insertions(+), 20 deletions(-)

diff --git a/hw/phb4.c b/hw/phb4.c
index b5bc53fb1b9e..9ece0f05cd41 100644
--- a/hw/phb4.c
+++ b/hw/phb4.c
@@ -925,7 +925,7 @@ static void phb4_init_ioda_cache(struct phb4 *p)
 	 */
 	for (i = 0; i < RTT_TABLE_ENTRIES; i++)
 		p->tbl_rtt[i] = PHB4_RESERVED_PE_NUM(p);
-	memset(p->peltv_cache, 0x0,  sizeof(p->peltv_cache));
+	memset(p->tbl_peltv, 0x0, p->tbl_peltv_size);
 	memset(p->tve_cache, 0x0, sizeof(p->tve_cache));
 
 	/* XXX Should we mask them ? */
@@ -1136,9 +1136,6 @@ static int64_t phb4_ioda_reset(struct phb *phb, bool purge)
 
 	/* Additional OPAL specific inits */
 
-	/* Clear the PELTV */
-	memcpy((void *)p->tbl_peltv, p->peltv_cache, p->tbl_peltv_size);
-
 	/* Clear PEST & PEEV */
 	for (i = 0; i < p->max_num_pes; i++) {
 		phb4_ioda_sel(p, IODA3_TBL_PESTA, i, false);
@@ -2150,7 +2147,6 @@ static int64_t phb4_set_peltv(struct phb *phb,
 			      uint8_t state)
 {
 	struct phb4 *p = phb_to_phb4(phb);
-	uint8_t *peltv;
 	uint32_t idx, mask;
 
 	/* Sanity check */
@@ -2162,15 +2158,10 @@ static int64_t phb4_set_peltv(struct phb *phb,
 	idx += (child_pe / 8);
 	mask = 0x1 << (7 - (child_pe % 8));
 
-	peltv = (uint8_t *)p->tbl_peltv;
-	peltv += idx;
-	if (state) {
-		*peltv |= mask;
-		p->peltv_cache[idx] |= mask;
-	} else {
-		*peltv &= ~mask;
-		p->peltv_cache[idx] &= ~mask;
-	}
+	if (state)
+		p->tbl_peltv[idx] |= mask;
+	else
+		p->tbl_peltv[idx] &= ~mask;
 
 	return OPAL_SUCCESS;
 }
@@ -4776,7 +4767,8 @@ static void phb4_init_ioda3(struct phb4 *p)
 	out_be64(p->regs + PHB_RTT_BAR, (u64) p->tbl_rtt | PHB_RTT_BAR_ENABLE);
 
 	/* Init_21 - PELT-V BAR */
-	out_be64(p->regs + PHB_PELTV_BAR, p->tbl_peltv | PHB_PELTV_BAR_ENABLE);
+	out_be64(p->regs + PHB_PELTV_BAR,
+		 (u64) p->tbl_peltv | PHB_PELTV_BAR_ENABLE);
 
 	/* Init_22 - Setup M32 starting address */
 	out_be64(p->regs + PHB_M32_START_ADDR, M32_PCI_START);
@@ -5276,9 +5268,9 @@ static void phb4_allocate_tables(struct phb4 *p)
 	for (i = 0; i < RTT_TABLE_ENTRIES; i++)
 		p->tbl_rtt[i] = PHB4_RESERVED_PE_NUM(p);
 
-	p->tbl_peltv = (uint64_t)local_alloc(p->chip_id, p->tbl_peltv_size, p->tbl_peltv_size);
+	p->tbl_peltv = local_alloc(p->chip_id, p->tbl_peltv_size, p->tbl_peltv_size);
 	assert(p->tbl_peltv);
-	memset((void *)p->tbl_peltv, 0, p->tbl_peltv_size);
+	memset(p->tbl_peltv, 0, p->tbl_peltv_size);
 
 	p->tbl_pest = (uint64_t)local_alloc(p->chip_id, p->tbl_pest_size, p->tbl_pest_size);
 	assert(p->tbl_pest);
@@ -5386,7 +5378,9 @@ static void phb4_add_properties(struct phb4 *p)
 		hi32((u64) p->tbl_rtt), lo32((u64) p->tbl_rtt), RTT_TABLE_SIZE);
 
 	dt_add_property_cells(np, "ibm,opal-peltv-table",
-		hi32(p->tbl_peltv), lo32(p->tbl_peltv), p->tbl_peltv_size);
+		hi32((u64) p->tbl_peltv), lo32((u64) p->tbl_peltv),
+		p->tbl_peltv_size);
+
 	dt_add_property_cells(np, "ibm,opal-pest-table",
 		hi32(p->tbl_pest), lo32(p->tbl_pest), p->tbl_pest_size);
 
diff --git a/include/phb4.h b/include/phb4.h
index 0f1d38b5c483..b69376648da7 100644
--- a/include/phb4.h
+++ b/include/phb4.h
@@ -198,7 +198,7 @@ struct phb4 {
 
 	/* SkiBoot owned in-memory tables */
 	uint16_t		*tbl_rtt;
-	uint64_t		tbl_peltv;
+	uint8_t			*tbl_peltv;
 	uint64_t		tbl_peltv_size;
 	uint64_t		tbl_pest;
 	uint64_t		tbl_pest_size;
@@ -217,7 +217,6 @@ struct phb4 {
 
 	/* FIXME: dynamically allocate only what's needed below */
 	uint64_t		tve_cache[1024];
-	uint8_t			peltv_cache[PELTV_TABLE_SIZE_MAX];
 	uint64_t		mbt_cache[32][2];
 	uint64_t		mdt_cache[512]; /* max num of PEs */
 	uint64_t		mist_cache[4096/4];/* max num of MSIs */
-- 
2.20.1



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