[Skiboot] [PATCH 3/3] npu2-opencapi: Log ODL endpoint information register

Andrew Donnellan andrew.donnellan at au1.ibm.com
Mon Nov 26 11:36:41 AEDT 2018


On 23/11/18 7:54 pm, Frederic Barrat wrote:
> If the link trains in degraded mode, log the ODL endpoint information
> register for debug. Its content is specific to the DLx and TLx
> implementation, so this is really information useful for the hardware
> team.
> 
> Signed-off-by: Frederic Barrat <fbarrat at linux.ibm.com>

Reviewed-by: Andrew Donnellan <andrew.donnellan at au1.ibm.com>

> ---
>   hw/npu2-opencapi.c  | 29 ++++++++++++++++++++++++++++-
>   include/npu2-regs.h |  5 +++++
>   2 files changed, 33 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/npu2-opencapi.c b/hw/npu2-opencapi.c
> index da86b46c..65f623c7 100644
> --- a/hw/npu2-opencapi.c
> +++ b/hw/npu2-opencapi.c
> @@ -174,6 +174,30 @@ static uint64_t get_odl_training_status(uint32_t gcid, uint64_t index)
>   	return reg;
>   }
>   
> +static uint64_t get_odl_endpoint_info(uint32_t gcid, uint64_t index)
> +{
> +	uint64_t status_xscom, reg;
> +
> +	switch (index) {
> +	case 2:
> +		status_xscom = OB0_ODL0_ENDPOINT_INFO;
> +		break;
> +	case 3:
> +		status_xscom = OB0_ODL1_ENDPOINT_INFO;
> +		break;
> +	case 4:
> +		status_xscom = OB3_ODL1_ENDPOINT_INFO;
> +		break;
> +	case 5:
> +		status_xscom = OB3_ODL0_ENDPOINT_INFO;
> +		break;
> +	default:
> +		assert(false);
> +	}
> +	xscom_read(gcid, status_xscom, &reg);
> +	return reg;
> +}
> +
>   static void disable_nvlink(uint32_t gcid, int index)
>   {
>   	uint64_t phy_config_scom, reg;
> @@ -1047,9 +1071,12 @@ static int64_t npu2_opencapi_get_link_state(struct pci_slot *slot, uint8_t *val)
>   
>   static void check_trained_link(struct npu2_dev *dev, uint64_t odl_status)
>   {
> -	if (get_link_width(odl_status) != OPAL_SHPC_LINK_UP_x8)
> +	if (get_link_width(odl_status) != OPAL_SHPC_LINK_UP_x8) {
>   		OCAPIERR(dev, "Link trained in degraded mode (%016llx)\n",
>   			odl_status);
> +		OCAPIDBG(dev, "Link endpoint info: %016llx\n",
> +			get_odl_endpoint_info(dev->npu->chip_id, dev->brick_index));
> +	}
>   }
>   
>   static int64_t npu2_opencapi_retry_state(struct pci_slot *slot,
> diff --git a/include/npu2-regs.h b/include/npu2-regs.h
> index c5096dd1..10a28166 100644
> --- a/include/npu2-regs.h
> +++ b/include/npu2-regs.h
> @@ -751,4 +751,9 @@ void npu2_scom_write(uint64_t gcid, uint64_t scom_base,
>   #define OB3_ODL1_TRAINING_STATUS		0xC01082F
>   #define   OB_ODL_TRAINING_STATUS_STS_RX_PATTERN_B PPC_BITMASK(8, 15)
>   
> +#define OB0_ODL0_ENDPOINT_INFO			0x9010832
> +#define OB0_ODL1_ENDPOINT_INFO			0x9010833
> +#define OB3_ODL0_ENDPOINT_INFO			0xC010832
> +#define OB3_ODL1_ENDPOINT_INFO			0xC010833
> +
>   #endif /* __NPU2_REGS_H */
> 

-- 
Andrew Donnellan              OzLabs, ADL Canberra
andrew.donnellan at au1.ibm.com  IBM Australia Limited



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