[Skiboot] [PATCH] Add the other 7 ATSD registers to the device tree.

Rashmica Gupta rashmica.g at gmail.com
Fri Nov 16 12:04:16 AEDT 2018


Suggested-by: Alexey Kardashevskiy <aik at ozlabs.ru>
Signed-off-by: Rashmica Gupta <rashmica.g at gmail.com>
---
 hw/npu2.c           | 15 ++++++++++-----
 include/npu2-regs.h |  2 ++
 2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/hw/npu2.c b/hw/npu2.c
index d7d94357..28745682 100644
--- a/hw/npu2.c
+++ b/hw/npu2.c
@@ -1781,7 +1781,7 @@ static void npu2_add_phb_properties(struct npu2 *p)
 {
 	struct dt_node *np = p->phb_nvlink.dt_node;
 	uint32_t icsp = get_ics_phandle();
-	uint64_t mm_base, mm_size, mmio_atsd;
+	uint64_t mm_base, mm_size;
 
 	/*
 	 * Add various properties that HB doesn't have to
@@ -1803,10 +1803,15 @@ static void npu2_add_phb_properties(struct npu2 *p)
 	dt_add_property_cells(np, "ibm,opal-reserved-pe",
 			      NPU2_RESERVED_PE_NUM);
 
-	mmio_atsd = (u64) p->regs +
-		NPU2_REG_OFFSET(NPU2_STACK_ATSD, NPU2_BLOCK_ATSD0, NPU2_XTS_MMIO_ATSD_LAUNCH);
-	dt_add_property_cells(np, "ibm,mmio-atsd", hi32(mmio_atsd),
-			      lo32(mmio_atsd));
+	dt_add_property_cells(np, "ibm,mmio-atsd",
+			hi32(MMIO_ATSD_ADDR(p->regs, 0)), lo32(MMIO_ATSD_ADDR(p->regs, 0)),
+			hi32(MMIO_ATSD_ADDR(p->regs, 1)), lo32(MMIO_ATSD_ADDR(p->regs, 1)),
+			hi32(MMIO_ATSD_ADDR(p->regs, 2)), lo32(MMIO_ATSD_ADDR(p->regs, 2)),
+			hi32(MMIO_ATSD_ADDR(p->regs, 3)), lo32(MMIO_ATSD_ADDR(p->regs, 3)),
+			hi32(MMIO_ATSD_ADDR(p->regs, 4)), lo32(MMIO_ATSD_ADDR(p->regs, 4)),
+			hi32(MMIO_ATSD_ADDR(p->regs, 5)), lo32(MMIO_ATSD_ADDR(p->regs, 5)),
+			hi32(MMIO_ATSD_ADDR(p->regs, 6)), lo32(MMIO_ATSD_ADDR(p->regs, 6)),
+			hi32(MMIO_ATSD_ADDR(p->regs, 7)), lo32(MMIO_ATSD_ADDR(p->regs, 7)));
 
 	/*
 	 * Memory window is exposed as 64-bits non-prefetchable
diff --git a/include/npu2-regs.h b/include/npu2-regs.h
index 8c1ba5ff..165e0b79 100644
--- a/include/npu2-regs.h
+++ b/include/npu2-regs.h
@@ -579,6 +579,8 @@ void npu2_scom_write(uint64_t gcid, uint64_t scom_base,
 #define NPU2_XTS_MMIO_ATSD_LAUNCH		0x000
 #define NPU2_XTS_MMIO_ATSD_AVA			0x008
 #define NPU2_XTS_MMIO_ATSD_STATUS		0x010
+#define MMIO_ATSD_ADDR(p, n) 			(u64) p + NPU2_REG_OFFSET(NPU2_STACK_ATSD,\
+						NPU2_BLOCK_ATSD##n, NPU2_XTS_MMIO_ATSD_LAUNCH)
 
 /* ALTD SCOM addresses */
 #define NPU2_MISC_SCOM_IND_SCOM_ADDR		0x68e
-- 
2.17.2



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