[Skiboot] [PATCH] phb4, doc: Make GPU-Direct bandwidth optimizations Witherspoon specific

Andrew Donnellan andrew.donnellan at au1.ibm.com
Mon Jul 30 15:52:56 AEST 2018


On 28/07/18 18:17, Vaibhav Jain wrote:
> Patch 5690c5a8980f("phb4: Reallocate PEC2 DMA-Read engines to improve
> GPU-Direct bandwidth") introduced allocation of extra DMA-read engines
> for improving Mellanox CX5 GPU-Direct bandwidth. At present CX5 is the
> only card thats using these optimizations so these changes will only
> impact Witherspoon systems.
> 
> However hardware team has raised the possibility of other
> non-witherspoon systems in future that may be using a similar card,
> where these optimizations wont be needed. So they have asked us to
> make these changes Witherspoon specific.
> 
> Hence this patch updates the phb4_init_capp_regs() &
> enable_capi_mode() to configure the extra DMA-read engine allocation
> if and only if skiboot is running on Witherspoon platform.
> 
> Cc: stable #5.0.6+

I suspect you mean 6.0.6 :)

> Fixes: 5690c5a8980f("phb4: Reallocate PEC2 DMA-Read engines to improve
> GPU-Direct bandwidth")
> Signed-off-by: Vaibhav Jain <vaibhav at linux.ibm.com>
> ---
>   .../opal-pci-set-phb-capi-mode-93.rst         |  8 ++--
>   hw/phb4.c                                     | 47 ++++++++++++-------
>   2 files changed, 35 insertions(+), 20 deletions(-)
> 
> diff --git a/doc/opal-api/opal-pci-set-phb-capi-mode-93.rst b/doc/opal-api/opal-pci-set-phb-capi-mode-93.rst
> index 6a8d2be8..09ecd69c 100644
> --- a/doc/opal-api/opal-pci-set-phb-capi-mode-93.rst
> +++ b/doc/opal-api/opal-pci-set-phb-capi-mode-93.rst
> @@ -44,10 +44,10 @@ CAPP-PSL transactions.
>   
>   Notes:
>   -----
> -* If PHB is in PEC2 then requesting mode `OPAL_PHB_CAPI_MODE_DMA_TVT1` will
> -  allocate extra 16/8 dma read engines to the PHB depending on its stack
> -  (stack 0/ stack 1). This is needed to improve the Direct-GPU DMA read
> -  performance for the Mellanox CX5 card.
> +* On a Witherspoon system if PHB is in PEC2 then requesting mode
> +  `OPAL_PHB_CAPI_MODE_DMA_TVT1` will allocate extra 16/8 dma read engines to the
> +  PHB depending on its stack (stack 0/ stack 1). This is needed to improve the
> +  Direct-GPU DMA read performance for the Mellanox CX5 card.
>   * Mode `OPAL_PHB_CAPI_MODE_PCIE` not yet supported on Power-9.
>   * Requesting mode `OPAL_PHB_CAPI_MODE_CAPI` on Power-9 will disable fast-reboot.
>   * Modes `OPAL_PHB_CAPI_MODE_DMA`, `OPAL_PHB_CAPI_MODE_SNOOP_OFF` are
> diff --git a/hw/phb4.c b/hw/phb4.c
> index a3aa8b80..ee238109 100644
> --- a/hw/phb4.c
> +++ b/hw/phb4.c
> @@ -148,6 +148,9 @@ static void phb4_init_hw(struct phb4 *p);
>   #define PHB4_CAN_STORE_EOI(p) \
>   	(XIVE_STORE_EOI_ENABLED && ((p)->rev >= PHB4_REV_NIMBUS_DD20))
>   
> +/* Are we running on a Witherspoon system */
> +#define IS_WITHERSPOON() (strcmp(platform.name, "Witherspoon") == 0)
> +

Hmm, a bit ugly, it'll be the only place in skiboot where we do anything 
based on platform name. Though the other option that comes to mind is 
adding an extra flag to struct platform, idk if this is big enough to 
warrant that.

Otherwise this looks okay.

-- 
Andrew Donnellan              OzLabs, ADL Canberra
andrew.donnellan at au1.ibm.com  IBM Australia Limited



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