[Skiboot] [PATCH 1/2] Move pb_cen_hp_mode_curr register definition to xscom-p9-reg.h
Alistair Popple
alistair at popple.id.au
Tue Jul 17 13:34:25 AEST 2018
Currently it is defined in npu2-regs.h but needs to be used by other files
as well so move it somewhere generic.
Signed-off-by: Alistair Popple <alistair at popple.id.au>
---
hw/npu2.c | 1 +
include/npu2-regs.h | 2 --
include/xscom-p9-regs.h | 4 ++++
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/npu2.c b/hw/npu2.c
index 8e2f6fe9..b8f0c21e 100644
--- a/hw/npu2.c
+++ b/hw/npu2.c
@@ -37,6 +37,7 @@
#include <phys-map.h>
#include <nvram.h>
#include <xive.h>
+#include <xscom-p9-regs.h>
#define NPU2_IRQ_BASE_SHIFT 13
#define NPU2_N_DL_IRQS 23
diff --git a/include/npu2-regs.h b/include/npu2-regs.h
index a8f571eb..3e4eff3f 100644
--- a/include/npu2-regs.h
+++ b/include/npu2-regs.h
@@ -36,8 +36,6 @@ void npu2_scom_write(uint64_t gcid, uint64_t scom_base,
#define MCD_BANK_CN_VALID PPC_BIT(0)
#define MCD_BANK_CN_SIZE PPC_BITMASK(13,29)
#define MCD_BANK_CN_ADDR PPC_BITMASK(33,63)
-#define PB_CENT_HP_MODE_CURR 0x5011c0c
-#define PB_CFG_CHG_RATE_GP_MASTER PPC_BIT(2)
#define PB_CENT_MODE 0x5011c0a
#define PB_CFG_CHIP_ADDR_EXTENSION_MASK_CENT PPC_BITMASK(42,48)
diff --git a/include/xscom-p9-regs.h b/include/xscom-p9-regs.h
index c3322499..42dd4267 100644
--- a/include/xscom-p9-regs.h
+++ b/include/xscom-p9-regs.h
@@ -29,4 +29,8 @@
#define P9_SCOM_SPRD 0x20010A81
+#define PB_CENT_HP_MODE_CURR 0x5011c0c
+#define PB_CFG_CHG_RATE_GP_MASTER PPC_BIT(2)
+#define PB_CFG_PUMP_MODE PPC_BIT(54)
+
#endif /* __XSCOM_P9_REGS_H__ */
--
2.11.0
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