[Skiboot] [PATCH 2/2] npu2/hw-procedures: Enable parity and credit overflow checks

[Andrew Donnellan]

On 14/07/18 07:02, Reza Arbab wrote:
> Enable these error checking features by setting the appropriate bits in
> our one-off initialization of each "NTL Misc Config 2" register.
> 
> The exception is NDL RX parity checking, which should be disabled during
> the link training procedures.
> 
> Signed-off-by: Reza Arbab <arbab at linux.ibm.com>

Reviewed-by: Andrew Donnellan <andrew.donnellan at au1.ibm.com>

> ---
>   hw/npu2-hw-procedures.c | 6 ++++++
>   hw/npu2.c               | 5 ++++-
>   include/npu2-regs.h     | 4 ++++
>   3 files changed, 14 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c
> index 8de6b4d..8686462 100644
> --- a/hw/npu2-hw-procedures.c
> +++ b/hw/npu2-hw-procedures.c
> @@ -260,6 +260,9 @@ uint32_t reset_ntl(struct npu2_dev *ndev)
>   	val = SETFIELD(PPC_BITMASK(0,1), 0ull, obus_brick_index(ndev));
>   	npu2_write_mask(ndev->npu, NPU2_NTL_PRI_CFG(ndev), val, -1ULL);
>   
> +	val = NPU2_NTL_MISC_CFG2_NDL_RX_PARITY_ENA;
> +	npu2_write_mask(ndev->npu, NPU2_NTL_MISC_CFG2(ndev), 0ull, val);
> +
>   	/* NTL Reset */
>   	val = npu2_read(ndev->npu, NPU2_NTL_MISC_CFG1(ndev));
>   	val |= PPC_BIT(8) | PPC_BIT(9);
> @@ -772,6 +775,9 @@ static uint32_t check_credits(struct npu2_dev *ndev)
>   	if (!poll_fence_status(ndev, 0x0))
>   		return PROCEDURE_COMPLETE | PROCEDURE_FAILED;
>   
> +	val = NPU2_NTL_MISC_CFG2_NDL_RX_PARITY_ENA;
> +	npu2_write_mask(ndev->npu, NPU2_NTL_MISC_CFG2(ndev), val, val);
> +
>   	return PROCEDURE_COMPLETE;
>   }
>   DEFINE_PROCEDURE(check_credits);
> diff --git a/hw/npu2.c b/hw/npu2.c
> index 231bd6e..ef2d4a9 100644
> --- a/hw/npu2.c
> +++ b/hw/npu2.c
> @@ -1404,7 +1404,10 @@ static void npu2_probe_phb(struct dt_node *dn)
>   	xscom_write_mask(gcid, 0x50112f1, PPC_BIT(41), PPC_BIT(41));
>   	xscom_write_mask(gcid, 0x50114f1, PPC_BIT(41), PPC_BIT(41));
>   
> -	val = NPU2_NTL_MISC_CFG2_BRICK_ENABLE;
> +	val = NPU2_NTL_MISC_CFG2_BRICK_ENABLE |
> +	      NPU2_NTL_MISC_CFG2_NDL_TX_PARITY_ENA |
> +	      NPU2_NTL_MISC_CFG2_NDL_PRI_PARITY_ENA |
> +	      NPU2_NTL_MISC_CFG2_RCV_CREDIT_OVERFLOW_ENA;
>   	xscom_write_mask(gcid, 0x5011110, val, val);
>   	xscom_write_mask(gcid, 0x5011130, val, val);
>   	xscom_write_mask(gcid, 0x5011310, val, val);
> diff --git a/include/npu2-regs.h b/include/npu2-regs.h
> index f67af97..7eb9d46 100644
> --- a/include/npu2-regs.h
> +++ b/include/npu2-regs.h
> @@ -269,6 +269,10 @@ void npu2_scom_write(uint64_t gcid, uint64_t scom_base,
>   /* NTL block registers */
>   #define NPU2_NTL_MISC_CFG2(ndev)		NPU2_NTL_REG_OFFSET(ndev, 0x000)
>   #define   NPU2_NTL_MISC_CFG2_BRICK_ENABLE	PPC_BIT(0)
> +#define   NPU2_NTL_MISC_CFG2_NDL_RX_PARITY_ENA	PPC_BIT(16)
> +#define   NPU2_NTL_MISC_CFG2_NDL_TX_PARITY_ENA	PPC_BIT(17)
> +#define   NPU2_NTL_MISC_CFG2_NDL_PRI_PARITY_ENA	PPC_BIT(18)
> +#define   NPU2_NTL_MISC_CFG2_RCV_CREDIT_OVERFLOW_ENA PPC_BIT(19)
>   #define NPU2_NTL_MISC_CFG3(ndev)		NPU2_NTL_REG_OFFSET(ndev, 0x008)
>   #define NPU2_NTL_ERR_HOLD1(ndev)		NPU2_NTL_REG_OFFSET(ndev, 0x010)
>   #define NPU2_NTL_ERR_MASK1(ndev)		NPU2_NTL_REG_OFFSET(ndev, 0x018)
> 

-- 
Andrew Donnellan              OzLabs, ADL Canberra
andrew.donnellan at au1.ibm.com  IBM Australia Limited