[Skiboot] [PATCH 2/2] phb3/phb4/p7ioc: Document supported TCE sizes in DT

Alexey Kardashevskiy aik at ozlabs.ru
Mon Feb 5 16:02:12 AEDT 2018


On 05/02/18 15:00, Russell Currey wrote:
> Add a new property, "ibm,supported-tce-sizes", to advertise to Linux how
> big the available TCE sizes are.  Each value is a bit shift, from
> smallest to largest.

Why would we possibly need such a limit? We already have an example of DDW
in sPAPR where possible IOMMU page sizes are fixed and there is no way to
have 2M IOMMU pages in the guest, now the same sort of limit is being added
to skiboot...


> 
> Signed-off-by: Russell Currey <ruscur at russell.cc>
> ---
>  hw/p7ioc-phb.c | 5 +++++
>  hw/phb3.c      | 5 +++++
>  hw/phb4.c      | 5 +++++
>  3 files changed, 15 insertions(+)
> 
> diff --git a/hw/p7ioc-phb.c b/hw/p7ioc-phb.c
> index 6c074518..b0a26e84 100644
> --- a/hw/p7ioc-phb.c
> +++ b/hw/p7ioc-phb.c
> @@ -2596,6 +2596,11 @@ static void p7ioc_pcie_add_node(struct p7ioc_phb *p)
>  	tkill = reg[0] + PHB_TCE_KILL;
>  	dt_add_property_cells(np, "ibm,opal-tce-kill",
>  			      hi32(tkill), lo32(tkill));
> +	dt_add_property_cells(np, "ibm,supported-tce-sizes",
> +			      12, // 4K
> +			      16, // 64K
> +			      24, // 16M
> +			      34); // 16G
>  
>  	/*
>  	 * Linux may use this property to allocate the diag data buffer, which
> diff --git a/hw/phb3.c b/hw/phb3.c
> index 0b4c3c32..0c4e1eb3 100644
> --- a/hw/phb3.c
> +++ b/hw/phb3.c
> @@ -4469,6 +4469,11 @@ static void phb3_add_properties(struct phb3 *p)
>  	tkill = reg + PHB_TCE_KILL;
>  	dt_add_property_cells(np, "ibm,opal-tce-kill",
>  			      hi32(tkill), lo32(tkill));
> +	dt_add_property_cells(np, "ibm,supported-tce-sizes",
> +			      12, // 4K
> +			      16, // 64K
> +			      24, // 16M
> +			      28); // 256M
>  
>  	/*
>  	 * Indicate to Linux that the architected IODA2 MSI EOI method
> diff --git a/hw/phb4.c b/hw/phb4.c
> index 0a7e3065..946f9ab6 100644
> --- a/hw/phb4.c
> +++ b/hw/phb4.c
> @@ -4688,6 +4688,11 @@ static void phb4_add_properties(struct phb4 *p)
>  	/* M64 ranges start at 1 as MBT0 is used for M32 */
>  	dt_add_property_cells(np, "ibm,opal-available-m64-ranges",
>  			      1, p->mbt_size - 1);
> +	dt_add_property_cells(np, "ibm,supported-tce-sizes",
> +			      12, // 4K
> +			      16, // 64K
> +			      21, // 2M
> +			      30); // 1G
>  
>  	/* Tell Linux about alignment limits for segment splits.
>  	 *
> 


-- 
Alexey


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