[Skiboot] [PATCH 02/13] hw/npu2: Merge implementations of BAR accessor functions

Frederic Barrat fbarrat at linux.ibm.com
Fri Dec 14 00:41:24 AEDT 2018



Le 12/12/2018 à 07:58, Andrew Donnellan a écrit :
> Move npu2_{get,read,write}_bar() to common code. Get rid of the OpenCAPI
> write_bar() function. Fix the OpenCAPI code to use the NVLink-style BAR
> accessor functions and struct npu2_bar.
> 
> While we're there, fix a trivial bug in npu2_read_bar() when reading PHY
> BARs - the global MMIO BAR is stack 0, not stack 2. I don't think we ever
> read that BAR, so this has never been a problem.
> 
> Signed-off-by: Andrew Donnellan <andrew.donnellan at au1.ibm.com>
> ---

1 minor comment below, but it ends up fixed by a later patch, so
Reviewed-by: Frederic Barrat <fbarrat at linux.ibm.com>



>   /* Procedure 13.1.3.8 - AFU MMIO Range BARs */
> @@ -803,15 +769,18 @@ static void setup_afu_mmio_bars(uint32_t gcid, uint32_t scom_base,
> 
>   	prlog(PR_DEBUG, "OCAPI: %s: Setup AFU MMIO BARs\n", __func__);
>   	phys_map_get(gcid, NPU_OCAPI_MMIO, dev->brick_index, &addr, &size);

That phys_map_get() is now useless and can go away. It's a collateral 
damage of the next patch, so it's only if you absolutely, positively 
want to have the history right :-)

> -
> -	prlog(PR_DEBUG, "OCAPI: AFU MMIO set to %llx, size %llx\n", addr, size);
> -	write_bar(gcid, scom_base, NPU2_REG_OFFSET(stack, 0, offset), addr,
> -		size);
> -	dev->bars[0].base = addr;
> -	dev->bars[0].size = size;
> -
> -	reg = SETFIELD(NPU2_CQ_CTL_MISC_MMIOPA_ADDR, 0ull, addr >> 16);
> -	reg = SETFIELD(NPU2_CQ_CTL_MISC_MMIOPA_SIZE, reg, ilog2(size >> 16));
> +	dev->bars[0].type = NPU_OCAPI_MMIO;
> +	dev->bars[0].index = dev->brick_index;
> +	dev->bars[0].reg = NPU2_REG_OFFSET(stack, 0, offset);
> +	dev->bars[0].enabled = true;
> +	npu2_get_bar(gcid, &dev->bars[0]);
> +
> +	prlog(PR_DEBUG, "OCAPI: AFU MMIO set to %llx, size %llx\n",
> +	      dev->bars[0].base, dev->bars[0].size);
> +	npu2_write_bar(NULL, &dev->bars[0], gcid, scom_base);
> +
> +	reg = SETFIELD(NPU2_CQ_CTL_MISC_MMIOPA_ADDR, 0ull, dev->bars[0].base >> 16);
> +	reg = SETFIELD(NPU2_CQ_CTL_MISC_MMIOPA_SIZE, reg, ilog2(dev->bars[0].size >> 16));
>   	prlog(PR_DEBUG, "OCAPI: PA translation %llx\n", reg);
>   	npu2_scom_write(gcid, scom_base,
>   			NPU2_REG_OFFSET(stack, NPU2_BLOCK_CTL,



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