[Skiboot] [RFC PATCH 3/3] Write boot progress to LPC ports 81 and 82
Stewart Smith
stewart at linux.ibm.com
Thu Dec 13 17:07:05 AEDT 2018
There's a thought to write more extensive boot progress codes to LPC
ports 81 and 82 to supplement/replace any reliance on port 80.
We want to still emit port 80 for platforms like Zaius and Barreleye
that have the physical display. Ports 81 and 82 can be monitored by a
BMC though.
Signed-off-by: Stewart Smith <stewart at linux.ibm.com>
---
hw/lpc-port80h.c | 78 +++++++++++++++++++++++++++++++++++++++++++
hw/test/run-port80h.c | 26 +++++++++++++--
2 files changed, 102 insertions(+), 2 deletions(-)
diff --git a/hw/lpc-port80h.c b/hw/lpc-port80h.c
index 72ac8b24b59d..60bde9262216 100644
--- a/hw/lpc-port80h.c
+++ b/hw/lpc-port80h.c
@@ -89,11 +89,89 @@ static inline uint8_t op_display_to_port80(uint8_t last_value, enum op_severity
return r;
}
+/*
+ * Convert our detailed op_display() call into 2 bytes for LPC port 81h and 82h
+ *
+ * This looks pretty similar to our port80 code.
+ * Notably we now have more bits to throw progress into.
+ *
+ * Our layout looks like this:
+ * MSB (bit 15): 1 = Comes from OPAL
+ * bit 14 : 0 = OP_MOD_INIT (the main one), 1 = (see bit 13)
+ * bits 13-2 : (if bit 6=0, low 12 bits of op-panel code)
+ * bit 13,12 : (if bit 6=1, other OP_MOD_ values in bits 13 and 12:
+ * 00b=OP_MOD_CPU, 01b=OP_MOD_LOCK,
+ * 10b=OP_MOD_MEM, 11b=OP_MOD_CHIPTOD)
+ * and bits 11-2 are low 10 bits of op-panel code)
+ *
+ * bit 1,0: 00b=OP_LOG, 10b=OP_WARN, 01b=OP_ERROR, 11b=OP_FATAL
+ * i.e. bit 0 indicates ERROR or FATAL.
+ *
+ * If port 80h number has the MSB and LSB set, then you died in OPAL.
+ * Any *odd* number with the MSB set (i.e. > 0x80) indicates error.
+ */
+static inline uint16_t op_display_to_port8x(uint16_t last_value, enum op_severity s, enum op_module m, uint16_t c)
+{
+ uint16_t r = 0x8000; /* Start with top bit set indicating in OPAL */
+
+ switch(m) {
+ case OP_MOD_INIT:
+ /* bit 6 is zero */
+ /* bits 13 through 2 have low 12 bits of c */
+ r |= (c & 0xFFF) << 2;
+ break;
+ case OP_MOD_CPU:
+ r |= 0x4000 | (c & 0x03FF) << 2;
+ break;
+ case OP_MOD_LOCK:
+ r |= 0x5000 | (c & 0x03FF) << 2;
+ break;
+ case OP_MOD_MEM:
+ r |= 0x6000 | (c & 0x03FF) << 2;
+ break;
+ case OP_MOD_CHIPTOD:
+ r |= 0x7000 | (c & 0x03FF) << 2;
+ break;
+ case OP_MOD_CORE:
+ /*
+ * Only current OP_MOD_CORE is where we're OP_FATAL,
+ * So let's go for the last value set and tweak the
+ * bits for OP_FATAL.
+ */
+ r = last_value & 0xFFFC;
+ break;
+ case OP_MOD_FSP:
+ case OP_MOD_FSPCON:
+ /* Should never be hit, port80h only used on non-FSP! */
+ break;
+ }
+
+ switch(s) {
+ case OP_LOG:
+ break;
+ case OP_WARN:
+ r |= 0x02;
+ break;
+ case OP_ERROR:
+ r |= 0x01;
+ break;
+ case OP_FATAL:
+ r |= 0x03;
+ }
+
+ return r;
+}
+
+
void op_display_lpc(enum op_severity s, enum op_module m, uint16_t c)
{
static uint8_t port80_val = 0x80;
+ static uint16_t port8x_val = 0x8000;
port80_val = op_display_to_port80(port80_val, s, m, c);
lpc_outb(port80_val, 0x80);
+ port8x_val = op_display_to_port8x(port8x_val, s, m, c);
+ lpc_outb(port8x_val >> 8, 0x81);
+ lpc_outb(port8x_val & 0xFF, 0x82);
}
diff --git a/hw/test/run-port80h.c b/hw/test/run-port80h.c
index 60f69864e8bb..6a9ec31b6e32 100644
--- a/hw/test/run-port80h.c
+++ b/hw/test/run-port80h.c
@@ -22,11 +22,17 @@
#define __LPC_H
uint8_t port80;
+uint16_t port8x;
static inline void lpc_outb(uint8_t data, uint32_t addr)
{
- assert(addr == 0x80);
- port80 = data;
+ assert((addr - 0x80) <= 2);
+ if (addr == 0x80)
+ port80 = data;
+ if (addr == 0x81)
+ port8x = data << 8 | (port8x & 0xff);
+ if (addr == 0x82)
+ port8x = (port8x & 0xff00) | data;
}
#include "op-panel.h"
@@ -40,32 +46,46 @@ int main(void)
{
op_display_lpc(OP_LOG, OP_MOD_INIT, 0x00);
assert(port80 == 0x80);
+ assert(port8x == 0x8000);
op_display_lpc(OP_WARN, OP_MOD_INIT, 0x00);
assert(port80 == 0x82);
+ assert(port8x == 0x8002);
op_display_lpc(OP_ERROR, OP_MOD_INIT, 0x00);
assert(port80 == 0x81);
+ assert(port8x == 0x8001);
op_display_lpc(OP_FATAL, OP_MOD_INIT, 0x00);
assert(port80 == 0x83);
+ assert(port8x == 0x8003);
op_display_lpc(OP_FATAL, OP_MOD_INIT, 0x0f);
assert(port80 == 0xBF);
+ assert(port8x == 0x803F);
op_display_lpc(OP_LOG, OP_MOD_INIT, 0x0f);
assert(port80 == 0xBC);
+ assert(port8x == 0x803C);
op_display_lpc(OP_FATAL, OP_MOD_CORE, 0x6666);
assert(port80 == 0xBF);
+ assert(port8x == 0x803F);
op_display_lpc(OP_LOG, OP_MOD_INIT, 0x01);
assert(port80 == 0x84);
+ assert(port8x == 0x8004);
op_display_lpc(OP_LOG, OP_MOD_CPU, 0x05);
assert(port80 == 0xC4);
+ assert(port8x == 0xC014);
op_display_lpc(OP_LOG, OP_MOD_LOCK, 0x07);
assert(port80 == 0xDC);
+ assert(port8x == 0xD01C);
op_display_lpc(OP_FATAL, OP_MOD_LOCK, 0x07);
assert(port80 == 0xDF);
+ assert(port8x == 0xD01F);
op_display_lpc(OP_FATAL, OP_MOD_MEM, 0x07);
assert(port80 == 0xEF);
+ assert(port8x == 0xE01F);
op_display_lpc(OP_WARN, OP_MOD_MEM, 0x02);
assert(port80 == 0xEA);
+ assert(port8x == 0xE00A);
op_display_lpc(OP_WARN, OP_MOD_CHIPTOD, 0x02);
assert(port80 == 0xFA);
+ assert(port8x == 0xF00A);
/*
* We can't assert that OP_MOD_FSP is invalid as we'd end up
@@ -73,7 +93,9 @@ int main(void)
*/
op_display_lpc(OP_LOG, OP_MOD_FSP, 0x00);
assert(port80 == 0x80);
+ assert(port8x == 0x8000);
op_display_lpc(OP_LOG, OP_MOD_FSPCON, 0x00);
assert(port80 == 0x80);
+ assert(port8x == 0x8000);
return 0;
}
--
2.20.0
More information about the Skiboot
mailing list