[Skiboot] [PATCH] phb4: Disable 32-bit MSI in capi mode

Stewart Smith stewart at linux.ibm.com
Thu Aug 16 19:20:49 AEST 2018

Frederic Barrat <fbarrat at linux.ibm.com> writes:
> If a capi device does a DMA write targeting an address lower than 4GB,
> it does so through a 32-bit operation, per the PCI spec. In capi mode,
> the first TVE entry is configured in bypass mode, so the address is
> valid. But with any (bad) luck, the address could be 0xFFFFxxxx, thus
> looking like a 32-bit MSI.
> We currently enable both 32-bit and 64-bit MSIs, so the PHB will
> interpret the DMA write as a MSI, which very likely results in an EEH
> (MSI with a bad payload size).
> We can fix it by disabling 32-bit MSI when switching the PHB to capi
> mode. Capi devices are 64-bit.
> Cc: stable
> Signed-off-by: Frederic Barrat <fbarrat at linux.ibm.com>
> ---
> Stewart: this is for CORAL and is undergoing a round of testing on a
> wider scale. It should only be merged once confirmed ok, hopefully
> later this week.

Okay, so the testing seems to have gone okay for people, and it's all
CAPI specific, so we should be okay...
master 3b9bc869a4fee22c99a4d24ba87ce938d46b11f4
6.0.x e72a16c4c0a12cb50c83cd47070fda28060e86b0

Stewart Smith
OPAL Architect, IBM.

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