[Skiboot] [PATCH v3] core: POWER9 implement OPAL_SIGNAL_SYSTEM_RESET

Nicholas Piggin npiggin at gmail.com
Tue Sep 19 10:42:35 AEST 2017

On Mon, 18 Sep 2017 17:45:41 +1000
Nicholas Piggin <npiggin at gmail.com> wrote:

> This implements OPAL_SIGNAL_SYSTEM_RESET, using scom registers to
> quiesce the target thread and raise a system reset exception on it.
> This has been tested on DD1 and DD2 including ESL=0 and ESL=1 power
> saving modes.
> It will have to be tested with deep idle states when those are enabled.
> If those cannot be supported, it should be possible to work around in
> Linux.
> Signed-off-by: Nicholas Piggin <npiggin at gmail.com>
> ---
> Hi,
> I'd like this to be considered for merge. It's been working for me
> without issue. It requires a Linux side patch for enablement as well.
> Without the Linux patch, this path won't be used. With the Linux patch,
> there remain fallbacks so this API can be disabled at any time.
> I have some follow up patches that bring some of the P8 sreset scoms
> from fast-reboot.c into here, then generalize them so fast reboot just
> calls sreset facilities. But let's get this patch in first.
> Thanks,
> Nick
> Changes since v2:
> - More comments, documentation, error handling.
> - Hardware requires all threads on a core to be quiesced before sending
>   the sreset, to avoid issues with thread reconfiguration. sresetting
>   a sibling quiesces all siblings except self, because we are not in
>   idle.

With further clarification from hardware, it seems that we only need
to quiesce the whole core on DD1. DD2 should only require the target
thread to be quiesced.

The patch still works fine as is. I'll add a streamlined path for DD2
in the next iteration.


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