[Skiboot] Skiboot upgrade needed for VAS/NX

[Oliver]

On Wed, Sep 6, 2017 at 4:10 AM, Sukadev Bhattiprolu
<sukadev at linux.vnet.ibm.com> wrote:
>
> Please note that if you are testing recent powerpc/next code with CONFIG_VAS
> enabled on a DD2 system, please upgrade to latest skiboot (5.8).
>
> Otherwise you will run into a machine check like this one reported by
> Nick Piggin.


What's the underlying issue here? We're supposed to avoid this sort of
issue though compat strings, etc. What bug is fixed in 5.8 that solves
this?

>
>>
>>
>> device-mapper: uevent: version 1.0.3
>> device-mapper: ioctl: 4.36.0-ioctl (2017-06-09) initialised: dm-devel at redhat.c
>> om
>> powernv-cpufreq: cpufreq pstate min 101 nominal 50 max 0
>> powernv-cpufreq: Workload Optimized Frequency is enabled in the platform
>> Disabling lock debugging due to kernel taint
>> Severe Machine check interrupt [Not recovered]
>>   NIP [c000000000098530]: reset_window_regs+0x20/0x220
>>   Initiator: CPU
>>   Error type: Unknown
>> opal: Machine check interrupt unrecoverable: MSR(RI=0)
>> opal: Hardware platform error: Unrecoverable Machine Check exception
>> CPU: 1 PID: 1 Comm: swapper/0 Tainted: G   M            4.13.0-rc7-00708-g8b680911e774-dirty #10
>> task: c000000f22680000 task.stack: c000000f22700000
>> NIP:  c000000000098530 LR: c000000000098758 CTR: 0000000000000000
>> REGS: c00000003ffebd80 TRAP: 0200   Tainted: G   M             (4.13.0-rc7-
>> 00708-g8b680911e774-dirty)
>> MSR:  9000000008349031 <SF,HV,EE,ME,IR,DR,LE>  CR: 24000224  XER: 00000000
>> CFAR: c000000000098754 DAR: 00000000100bef30 DSISR: 40000000 SOFTE: 0
>> GPR00: c000000000098f44 c000000f22703a00 c000000000eff200 c000000f1cf861e0
>> GPR04: c000000f22703a50 0000000000000001 0000000000000fff 0000000000000003
>> GPR08: c00c0000842f0000 0000000000000001 0000000000000000 0000000000000000
>> GPR12: 0000000000000000 c00000000fd40580 c000000000c03590 c000000000c1f428
>> GPR16: c000000000c4a640 c000000000c31360 c000000000c92738 c000000000c92690
>> GPR20: c000000000c926a0 c000000000c926f0 c000000f1d672940 0000000000000000
>> GPR24: c000000000c92638 0000000000000000 c000000000e888b0 c000000000dce428
>> GPR28: 0000000000000002 c000000f0e800000 c000000f22703a50 c000000f1cf861e0
>> NIP [c000000000098530] reset_window_regs+0x20/0x220
>> LR [c000000000098758] init_winctx_regs+0x28/0x6c0
>> Call Trace:
>> [c000000f22703a00] [0000000000000002] 0x2 (unreliable)
>> [c000000f22703a30] [c000000000098f44] vas_rx_win_open.part.11+0x154/0x210
>> [c000000f22703ae0] [c000000000d668e8] nx842_powernv_init+0x6b4/0x824
>> [c000000f22703c[   38.412765557,0] OPAL: Reboot requested due to Platform
>> error.
>> [   38.412828287,3] OPAL: Reboot requested due to Platform error.40]
>> [c00000000000ca60] do_one_initcall+0x60/0x1c0
>>
>>
>> c000000000098510 <reset_window_regs>:
>> c000000000098510:       00 00 40 39     li      r10,0
>> c000000000098514:       10 00 23 e9     ld      r9,16(r3)
>> c000000000098518:       ac 04 00 7c     hwsync
>> c00000000009851c:       10 00 49 f9     std     r10,16(r9)
>> c000000000098520:       01 00 20 39     li      r9,1
>> c000000000098524:       7c 02 2d 99     stb     r9,636(r13)
>> c000000000098528:       10 00 03 e9     ld      r8,16(r3)
>> c00000000009852c:       ac 04 00 7c     hwsync
>> c000000000098530:       18 00 48 f9     std     r10,24(r8)
>> c000000000098534:       7c 02 2d 99     stb     r9,636(r13)
>> c000000000098538:       10 00 03 e9     ld      r8,16(r3)
>> c00000000009853c:       ac 04 00 7c     hwsync
>>
>> SSR1 makes this look like an i-side 1101 MCE, except that SRR1[42]=1,
>> which is a d-side MCE, but DSISR is invalid for that case.
>>
>> So we have two issues, one is code causing the MCE, and the other is
>> that the MCE is not being reported correctly.
>>
>> Thanks,
>> Nick
>>
>
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