[Skiboot] [PATCH RFC 2/2] phb4: Use ASB for read/writes to PHB registers on resets

Benjamin Herrenschmidt benh at kernel.crashing.org
Wed Oct 4 00:53:36 AEDT 2017

On Tue, 2017-10-03 at 11:38 +1100, Michael Neuling wrote:
> I'm not sure I'm keen on this solution.  We have this code in the creset path
> which is calling phb4_init_hw()
>         case PHB4_SLOT_CRESET_REINIT:
>                 PHBDBG(p, "CRESET: Reinitialization\n");
>                 p->flags &= ~PHB4_AIB_FENCED;
>                 p->flags &= ~PHB4_CAPP_RECOVERY;
>                 p->flags &= ~PHB4_CFG_USE_ASB;
>                 phb4_init_hw(p, false);
>                 pci_slot_set_state(slot, PHB4_SLOT_CRESET_FRESET);
>                 return pci_slot_set_sm_timeout(slot, msecs_to_tb(100));
> It seems we are clearing it, and then you are setting it immediately after. 
> Seems like the initial clearing would be wrong and we're just papering over the
> issue.

No. We should only enter that state after we have successfully cleared
the fence already by resetting the logic.

If the fence is still up, we have a problem but all I see is papering
over it, not understanding and fixing it properly.

We could add a proper fence check after clearing the flags and before
doing a reinit, and maybe trying to go back to PHB4_SLOT_CRESET_START
if we git (with a retry count) but it would be useful to understand
how come we end up there fenced.

You might need to work with Ric on sorting out the sequence here.


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