[Skiboot] [PATCH] phys-map: fix hole in NPU2 BARs

[Michael Neuling]

On Fri, 2017-05-12 at 15:39 +1000, Andrew Donnellan wrote:
> The global physical memory map added in commit 5f67c1e25378 ("Add global
> physical memory map") leaves a hole between NPU_PHY_1 and NPU_NTL_0 of size
> 0x20000.
> 
> Move the BARs in the map from NPU_NTL_0 to NPU_GENID_2 up by 0x20000 to fix
> this.
> 
> Reported-by: Alistair Popple <alistair at popple.id.au>
> Fixes: 5f67c1e25378 ("Add global physical memory map")
> Signed-off-by: Andrew Donnellan <andrew.donnellan at au1.ibm.com>

I've send the identical patch as part of a series that fixes another issue plus
adds some tests to ensure we don't create a hole like this again in the future.

  https://lists.ozlabs.org/pipermail/skiboot/2017-May/007287.html

Stewart, it's probably easier for you to just pickup my series and ignore ajd's
patch here.

Mikey

> ---
>  hw/phys-map.c | 20 ++++++++++----------
>  1 file changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/hw/phys-map.c b/hw/phys-map.c
> index 768f464f..95bb3035 100644
> --- a/hw/phys-map.c
> +++ b/hw/phys-map.c
> @@ -98,16 +98,16 @@ static const struct phys_map_entry phys_map_table_nimbus[]
> = {
>  	{ NPU_REGS       , 0, 0x0006030200000000ull, 0x0000000001000000ull },
>  	{ NPU_PHY        , 0, 0x0006030201200000ull, 0x0000000000200000ull },
>  	{ NPU_PHY	 , 1, 0x0006030201400000ull, 0x0000000000200000ull
> },
> -	{ NPU_NTL	 , 0, 0x0006030201620000ull, 0x0000000000020000ull
> },
> -	{ NPU_NTL	 , 1, 0x0006030201640000ull, 0x0000000000020000ull
> },
> -	{ NPU_NTL	 , 2, 0x0006030201660000ull, 0x0000000000020000ull
> },
> -	{ NPU_NTL	 , 3, 0x0006030201680000ull, 0x0000000000020000ull
> },
> -	{ NPU_NTL	 , 4, 0x00060302016a0000ull, 0x0000000000020000ull
> },
> -	{ NPU_NTL	 , 5, 0x00060302016c0000ull, 0x0000000000020000ull
> },
> -	{ NPU_GENID	 , 0, 0x00060302016e0000ull, 0x0000000000020000ull
> },
> -	{ NPU_GENID	 , 1, 0x0006030201700000ull, 0x0000000000020000ull
> },
> -	{ NPU_GENID	 , 2, 0x0006030201720000ull, 0x0000000000020000ull
> },
> -	{ RESV	         , 5, 0x0006030201740000ull,
> 0x00000000018c0000ull },
> +	{ NPU_NTL	 , 0, 0x0006030201600000ull, 0x0000000000020000ull
> },
> +	{ NPU_NTL	 , 1, 0x0006030201620000ull, 0x0000000000020000ull
> },
> +	{ NPU_NTL	 , 2, 0x0006030201640000ull, 0x0000000000020000ull
> },
> +	{ NPU_NTL	 , 3, 0x0006030201660000ull, 0x0000000000020000ull
> },
> +	{ NPU_NTL	 , 4, 0x0006030201680000ull, 0x0000000000020000ull
> },
> +	{ NPU_NTL	 , 5, 0x00060302016a0000ull, 0x0000000000020000ull
> },
> +	{ NPU_GENID	 , 0, 0x00060302016c0000ull, 0x0000000000020000ull
> },
> +	{ NPU_GENID	 , 1, 0x00060302016e0000ull, 0x0000000000020000ull
> },
> +	{ NPU_GENID	 , 2, 0x0006030201700000ull, 0x0000000000020000ull
> },
> +	{ RESV	         , 5, 0x0006030201720000ull,
> 0x00000000018e0000ull },
>  	{ PSI_LINK       , 0, 0x0006030203000000ull, 0x0000000000100000ull },
>  	{ XIVE_IC        , 0, 0x0006030203100000ull, 0x0000000000080000ull },
>  	{ XIVE_TM        , 0, 0x0006030203180000ull, 0x0000000000040000ull },