[Skiboot] [RFC 4/4] SLW: Enable Stop4 as the deepest idle state

[Oliver O'Halloran]

On Thu, May 4, 2017 at 5:16 PM, Akshay Adiga
<akshay.adiga at linux.vnet.ibm.com> wrote:
> Adding stop4 to device tree as the deepest idle state for power9 dd1.
> The latency is choosen such that they are not chosen for cpuidle and
> will only be used for cpuhotplug.
>
> Use a common variable has_wakeup_engine instead of has_slw to tell if
> the
> a) SLW image is populated in case of power8
> b) CME image is populated in case of power9
>
> Currently we expect CME to be loaded if homer address is known ( except
> for simulators)
>
> Signed-off-by: Akshay Adiga <akshay.adiga at linux.vnet.ibm.com>
> ---
>  hw/slw.c | 29 ++++++++++++++++++++++++-----
>  1 file changed, 24 insertions(+), 5 deletions(-)
>
> diff --git a/hw/slw.c b/hw/slw.c
> index aeb8388..93d5aae 100644
> --- a/hw/slw.c
> +++ b/hw/slw.c
> @@ -700,6 +700,22 @@ static struct cpu_idle_states power9_dd1_cpu_idle_states[] = {
>                                  | OPAL_PM_PSSCR_TR(3) \
>                                  | OPAL_PM_PSSCR_ESL \
>                                  | OPAL_PM_PSSCR_EC,
> +               .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK },
> +       {
> +               .name = "stop4",
> +               .latency_ns = 2060000,
> +               .residency_ns = 1000000,
> +               .flags = 1*OPAL_PM_DEC_STOP \
> +                      | 1*OPAL_PM_TIMEBASE_STOP  \
> +                      | 1*OPAL_PM_LOSE_USER_CONTEXT \
> +                      | 1*OPAL_PM_LOSE_HYP_CONTEXT \
> +                      | 1*OPAL_PM_LOSE_FULL_CONTEXT \
> +                      | 1*OPAL_PM_STOP_INST_DEEP,
> +               .pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(4) \
> +                                | OPAL_PM_PSSCR_MTL(7) \
> +                                | OPAL_PM_PSSCR_TR(3) \
> +                                | OPAL_PM_PSSCR_ESL \
> +                                | OPAL_PM_PSSCR_EC,
>                 .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK }
>  };
>
> @@ -712,7 +728,7 @@ void add_cpu_idle_state_properties(void)
>         int nr_states;
>
>         bool can_sleep = true;
> -       bool has_slw = true;
> +       bool has_wakeup_engine = true;  /* p8=SLW; p9=CME */
>         bool has_stop_inst = false;
>         u8 i;
>
> @@ -802,8 +818,11 @@ void add_cpu_idle_state_properties(void)
>         }
>
>         /* Enable deep idle states only if slw image is intact */
> -       has_slw = (chip->slw_base && chip->slw_bar_size &&
> -                       chip->slw_image_size);
> +       if (proc_gen == proc_gen_p8)
> +               has_wakeup_engine = (chip->slw_base && chip->slw_bar_size &&
> +                               chip->slw_image_size);
> +       else /*if (proc_gen == proc_gen_p9)*/
> +               has_wakeup_engine = !(QUIRK_MAMBO_CALLOUTS);

QUIRK_MAMBO_CALLOUTS is a constant so this is always false. If you
want to query if the currently running system has that quirk use:
chip_quirk(QUIRK_MAMBO_CALLOUTS)

>
>         /*
>          * Currently we can't append strings and cells to dt properties.
> @@ -831,7 +850,7 @@ void add_cpu_idle_state_properties(void)
>         if (has_stop_inst) {
>                 /* Power 9 / POWER ISA 3.0 */
>                 supported_states_mask = OPAL_PM_STOP_INST_FAST;
> -               if (has_slw)
> +               if (has_wakeup_engine)
>                         supported_states_mask |= OPAL_PM_STOP_INST_DEEP;
>         } else {
>                 /* Power 7 and Power 8 */
> @@ -839,7 +858,7 @@ void add_cpu_idle_state_properties(void)
>                 if (can_sleep)
>                         supported_states_mask |= OPAL_PM_SLEEP_ENABLED |
>                                                 OPAL_PM_SLEEP_ENABLED_ER1;
> -               if (has_slw)
> +               if (has_wakeup_engine)
>                         supported_states_mask |= OPAL_PM_WINKLE_ENABLED;
>         }
>         for (i = 0; i < nr_states; i++) {
> --
> 2.5.5
>
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