[Skiboot] [PATCH V3] slw: use only lite stop[0, 1] states for P9 DD1

[Shilpasri G Bhat]

POWER9 DD1 chip can work with lite stop[0,1] states now. These
STOP states have ESL=EC=0 and provide fast entry/exit.

Signed-off-by: Shilpasri G Bhat <shilpa.bhat at linux.vnet.ibm.com>
Signed-off-by: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
---
Changes from V2:
- Disbale Stop2 state for DD1

Changes from V1:
- Removed only_lite variable.
- Moved the ESL check inside "if (has_stop_inst)"

 hw/slw.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/hw/slw.c b/hw/slw.c
index 97d4758..2385816 100644
--- a/hw/slw.c
+++ b/hw/slw.c
@@ -680,6 +680,10 @@ void add_cpu_idle_state_properties(void)
 
 		stop_levels = dt_prop_get_u32_def(power_mgt,
 			"ibm,enabled-stop-levels", 0);
+
+		/* Disable Stop2 for P9 DD1 */
+		if (chip->ec_level == 0x10)
+			stop_levels &= ~0x20000000;
 		if (!stop_levels)
 			prerror("SLW: No stop levels available. Power saving is disabled!\n");
 
@@ -765,6 +769,11 @@ void add_cpu_idle_state_properties(void)
 		if (has_stop_inst) {
 			u32 level = 31 - (states[i].pm_ctrl_reg_val &
 					 OPAL_PM_PSSCR_RL_MASK);
+			u64 esl = states[i].pm_ctrl_reg_val &
+				  OPAL_PM_PSSCR_ESL;
+
+			if (chip->ec_level == 0x10 && esl)
+				continue;
 
 			if (!(stop_levels & (1ul << level)))
 				continue;
-- 
1.8.3.1