[Skiboot] [PATCH V6 3/5] capi: Enable capi mode for PHB4
christophe lombard
clombard at linux.vnet.ibm.com
Mon Jun 19 22:07:21 AEST 2017
Le 16/06/2017 à 09:14, Michael Neuling a écrit :
> On Mon, 2017-06-12 at 17:48 +0200, Christophe Lombard wrote:
>>> From: Christophe Lombard <christophe_lombard at fr.ibm.cm>
>> Enable the Coherently attached processor interface. The PHB is used as
>> a CAPI interface.
>> CAPI Adapters can be connected to either PEC0 or PEC2. Single port
>> CAPI adapter can be connected to either PEC0 or PEC2, but Dual-Port
>> Adapter can be only connected to PEC2
>> CAPP0 attached to PHB0(PEC0 - single port)
>> CAPP1 attached to PHB3(PEC2 - single or dual port)
>> As we did for PHB3, a new specific file 'phb4-capp.h' is created to
>> contain the CAPP register definitions.
> <snip>
>
>> + /* PEC Phase 3 (PBCQ) registers Init */
>>> + /* poll cqstat
>>> + * CAPP0 attached to PHB0(PEC0)
>>> + * CAPP1 attached to PHB3(PEC2)
>>> + */
>>> + if (p->index == 0) {
>>> + /* PEC 0 */
>>> + offset = 0x40;
>>> + } else if (p->index == 1 || p->index == 2) {
>>> + /* PEC 1 */
>>> + offset = 0x80;
> The commit message suggests PEC1 is not supported. So why don't we error out
> here?
>
> Mikey
Thanks Mikey. We will correct this point even if the function
load_capp_ucode()
"protects" an unsupported PEC.
>> + } else {
>>> + /* PEC 2 */
>>> + offset = 0xC0;
>>> + }
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