[Skiboot] [PATCH v3] phb4: Activate shared PCI slot on witherspoon

[Stewart Smith]

Frederic Barrat <fbarrat at linux.vnet.ibm.com> writes:
> Witherspoon systems come with a 'shared' PCI slot: physically, it
> looks like a x16 slot, but it's actually two x8 slots connected to two
> PHBs of two different chips. Taking advantage of it requires some
> logic on the PCI adapter. Only the Mellanox CX5 adapter is known to
> support it at the time of this writing.
>
> This patch enables support for the shared slot on witherspoon if a x16
> adapter is detected. Each x8 slot has a presence bit, so both bits
> need to be set for the activation to take place. Slot sharing is
> activated through a gpio.
>
> Note that there's no easy way to be sure that the card is indeed a
> shared-slot compatible PCI adapter and not a normal x16 card. Plugging
> a normal x16 adapter on the shared slot should be avoided on
> witherspoon, as the link won't train on the second slot, resulting in
> a timeout and a longer boot time. Only the first slot is usable and
> the x16 adapter will end up using only half the lines.
>
> If the PCI card plugged on the physical slot is only x8 (or less),
> then the presence bit of the second slot is not set, so this patch
> does nothing. The x8 (or less) adapter should work like on any other
> physical slot.
>
> Signed-off-by: Frederic Barrat <fbarrat at linux.vnet.ibm.com>
> ---
> Changelog:
> v3: fix in case there's only one chip left (Mikey)
> v2: address comment from Ben and Mikey
>
>  core/pci.c                     |  3 ++
>  hw/phb4.c                      | 90 +++++++++++++++++++++++++++++++++++++++++-
>  include/platform.h             |  5 +++
>  include/skiboot.h              |  1 +
>  include/xscom-p9-regs.h        |  3 ++
>  platforms/astbmc/witherspoon.c |  6 +++
>  6 files changed, 107 insertions(+), 1 deletion(-)
>
> diff --git a/core/pci.c b/core/pci.c
> index 2d3c4f88..e5ec97e8 100644
> --- a/core/pci.c
> +++ b/core/pci.c
> @@ -1646,6 +1646,9 @@ void pci_init_slots(void)
>  	 */
>  	time_wait_ms(20);
>
> +	if (platform.pre_pci_fixup)
> +		platform.pre_pci_fixup();
> +
>  	prlog(PR_NOTICE, "PCI: Resetting PHBs...\n");
>  	pci_do_jobs(pci_reset_phb);
>
> diff --git a/hw/phb4.c b/hw/phb4.c
> index b53dadfb..ee8e03f7 100644
> --- a/hw/phb4.c
> +++ b/hw/phb4.c
> @@ -77,6 +77,94 @@ static void phb4_init_hw(struct phb4 *p, bool first_init);
>  #define PHBLOGCFG(p, fmt, a...) do {} while (0)
>  #endif
>
> +#define PHB4_PER_CHIP                        6 /* Max 6 PHBs per chip on p9 */
> +#define PHB4_SHARED_SLOT_IDX_WITHERSPOON     3
> +
> +static int phb4_get_opal_id(unsigned int chip_id, unsigned int index)
> +{
> +	return chip_id * PHB4_PER_CHIP + index;
> +}
> +
> +static void phb4_activate_shared_slot_witherspoon(struct proc_chip *chip)
> +{
> +	uint64_t val;

I moved things around a bit in preparation for merging this (will send
patch in a tic) so that all the platform specific code was over in
witherspoon.c rather than in the phb4 source.

Then, as if somebody heard me about to merge something, the one working
witherspoon I could find to test on has bricked itself in the middle of
running the test suite... so I'm a bit nervous about hitting merge today
until I dig into it tomorrow.

Thoughts on my revised patch appreciated though.

-- 
Stewart Smith
OPAL Architect, IBM.