[Skiboot] [PATCH] p8-i2c: occ: Add support for OCC to use I2C engines
oohall at gmail.com
Wed Jun 7 10:34:13 AEST 2017
On Tue, Jun 6, 2017 at 10:50 PM, Joel Stanley <joel at jms.id.au> wrote:
> On Tue, Jun 6, 2017 at 8:41 PM, Stewart Smith
> <stewart at linux.vnet.ibm.com> wrote:
>> From: Shilpasri G Bhat <shilpa.bhat at linux.vnet.ibm.com>
>> + * On POWER9, the I2C may also wish to use some of the i2cm engines,
>> + * to do things like read sensor data. There's a couple of shared
>> + * registers with the OCC to negotiate locking of the i2cm engines.
>> + * See occ/src/occ_405/lock/lock.c
> Out of interest, is this the same i2cm engines that are accessed by
> the BMC over FSI?
The pervasive specs say the I2C masters have XSCOM and FSI access
ports, so probably.
> If so, how does skiboot and/or the OCC mediate access with the BMC?
I was under the impression we were cutting off the FSI bridge once the
host was up. What does the BMC need the host's I2C masters for? There
are spare bits in the OCC flag register that we could use for
additional handshaking, but I imagine the OCC team don't really care
about who sets the lock bits so we might need some other side-channel.
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