[Skiboot] [PATCH] npu2: Fix npu2_{read,write}_4b()

Reza Arbab arbab at linux.vnet.ibm.com
Sat Jun 3 00:14:35 AEST 2017


When writing or reading 4-byte values, we need to use the upper half of
the 64-bit SCOM register.

Fix npu2_{read,write}_4b() and their callers to use uint32_t, and
appropriately shift the value being written or returned.

Signed-off-by: Reza Arbab <arbab at linux.vnet.ibm.com>
---
 hw/npu2-hw-procedures.c |  4 ++--
 hw/npu2.c               | 10 ++++++----
 include/npu2.h          |  4 ++--
 3 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c
index ff0768b..4b6f891 100644
--- a/hw/npu2-hw-procedures.c
+++ b/hw/npu2-hw-procedures.c
@@ -204,11 +204,11 @@ static uint32_t reset_ndl(struct npu2_dev *ndev)
 
 	npu2_write_mask(ndev->npu, NPU2_NTL_PRI_CFG(ndev), val, -1ULL);
 
-	val = PPC_BIT(0) | PPC_BIT(1);
+	val = PPC_BIT32(0) | PPC_BIT32(1);
 
 	npu2_write_4b(ndev->npu, NPU2_NTL_DL_CONTROL(ndev), val);
 	npu2_write_4b(ndev->npu, NPU2_NTL_DL_CONTROL(ndev), 0);
-	npu2_write_4b(ndev->npu, NPU2_NTL_DL_CONFIG(ndev), PPC_BIT(0));
+	npu2_write_4b(ndev->npu, NPU2_NTL_DL_CONFIG(ndev), PPC_BIT32(0));
 
 	npu2_write_4b(ndev->npu, NPU2_NTL_DL_MAGIC_1(ndev), 0x400017df);
 	npu2_write_4b(ndev->npu, NPU2_NTL_DL_MAGIC_2(ndev), 0x484965f5);
diff --git a/hw/npu2.c b/hw/npu2.c
index c662303..e8c7cb8 100644
--- a/hw/npu2.c
+++ b/hw/npu2.c
@@ -87,14 +87,16 @@ static uint64_t npu2_scom_read(uint64_t gcid, uint64_t scom_base,
 	return val;
 }
 
-void npu2_write_4b(struct npu2 *p, uint64_t reg, uint64_t val)
+void npu2_write_4b(struct npu2 *p, uint64_t reg, uint32_t val)
 {
-	npu2_scom_write(p->chip_id, p->xscom_base, reg, NPU2_MISC_DA_LEN_4B, val);
+	npu2_scom_write(p->chip_id, p->xscom_base, reg, NPU2_MISC_DA_LEN_4B,
+			(uint64_t)val << 32);
 }
 
-uint64_t npu2_read_4b(struct npu2 *p, uint64_t reg)
+uint32_t npu2_read_4b(struct npu2 *p, uint64_t reg)
 {
-	return npu2_scom_read(p->chip_id, p->xscom_base, reg, NPU2_MISC_DA_LEN_4B);
+	return npu2_scom_read(p->chip_id, p->xscom_base, reg,
+			      NPU2_MISC_DA_LEN_4B) >> 32;
 }
 
 void npu2_write(struct npu2 *p, uint64_t reg, uint64_t val)
diff --git a/include/npu2.h b/include/npu2.h
index d15b2c9..6476c72 100644
--- a/include/npu2.h
+++ b/include/npu2.h
@@ -139,8 +139,8 @@ static inline struct npu2 *phb_to_npu2(struct phb *phb)
 	return container_of(phb, struct npu2, phb);
 }
 
-void npu2_write_4b(struct npu2 *p, uint64_t reg, uint64_t val);
-uint64_t npu2_read_4b(struct npu2 *p, uint64_t reg);
+void npu2_write_4b(struct npu2 *p, uint64_t reg, uint32_t val);
+uint32_t npu2_read_4b(struct npu2 *p, uint64_t reg);
 void npu2_write(struct npu2 *p, uint64_t reg, uint64_t val);
 uint64_t npu2_read(struct npu2 *p, uint64_t reg);
 void npu2_write_mask(struct npu2 *p, uint64_t reg, uint64_t val, uint64_t mask);
-- 
1.8.3.1



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