[Skiboot] [PATCH 01/14] phb4: Only clear some PHB config space registers on errors
stewart at linux.vnet.ibm.com
Fri Jul 28 16:43:33 AEST 2017
Michael Neuling <mikey at neuling.org> writes:
> Currently on error we clear the entire PHB config space. This is a
> problem as the PCIe Maximum Payload Size (MPS) negotiation may have
> already occurred. Clearing MPS in the PHB back to a default of 128
> bytes will result an error for a device which already has a larger MPS
> This will manifest itself as error due to a malformed TLP packet. ie.
> phbPblErrorStatus bit 41 = "Malformed TLP error"
> This has been seen after kexec on with some adapters.
> This fixes the problem by only clearing a subset of registers on a phb
> Reported-by: Rob Lippert <rlippert at google.com>
> Signed-off-by: Michael Neuling <mikey at neuling.org>
> hw/phb4.c | 51 ++++++++++++++++++++++++++++++++-------------------
> 1 file changed, 32 insertions(+), 19 deletions(-)
Thanks! Series merged to master as of
I'll put up a PR for updating it in op-build today, but it may not pass
through all the CI before beer o'clock.
OPAL Architect, IBM.
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