[Skiboot] [PATCH 13/14] Revert "phb4: Read PERST signal rather than assuming it's asserted"

Michael Neuling mikey at neuling.org
Wed Jul 26 20:50:12 AEST 2017


This reverts commit b42ff2b904165addf32e77679cebb94a08086966

The original patch assumes that PERST has been asserted well before (>
250ms) we hit here (ie. during hostboot).

In a subesquent patch this will no longer be the case as we need to
assert PERST during PHB reset, which may only be a few milliseconds
before we hit this code.

Hence revert this patch. Go back to the software mechanism using
skip_perst to determine if PERST should be asserted or not. This
allows us to keep the speed optimisation on boot.

Signed-off-by: Michael Neuling <mikey at neuling.org>
---
 hw/phb4.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/phb4.c b/hw/phb4.c
index ba074c2fdc..c978050d5f 100644
--- a/hw/phb4.c
+++ b/hw/phb4.c
@@ -2544,9 +2544,9 @@ static int64_t phb4_freset(struct pci_slot *slot)
 		phb4_prepare_link_change(slot, false);
 		/* fall through */
 	case PHB4_SLOT_FRESET_START:
-		reg = in_be64(p->regs + PHB_PCIE_CRESET);
-		if ((reg & PHB_PCIE_CRESET_PERST_N) != 0) {
+		if (!p->skip_perst) {
 			PHBDBG(p, "FRESET: Assert\n");
+			reg = in_be64(p->regs + PHB_PCIE_CRESET);
 			reg &= ~PHB_PCIE_CRESET_PERST_N;
 			out_be64(p->regs + PHB_PCIE_CRESET, reg);
 			pci_slot_set_state(slot,
@@ -2555,7 +2555,7 @@ static int64_t phb4_freset(struct pci_slot *slot)
 			return pci_slot_set_sm_timeout(slot, msecs_to_tb(250));
 		}
 
-		/* To skip perst assert if already asserted (ie. boot time) */
+		/* To skip the assert during boot time */
 		PHBDBG(p, "FRESET: Assert skipped\n");
 		pci_slot_set_state(slot, PHB4_SLOT_FRESET_ASSERT_DELAY);
 		p->skip_perst = false;
-- 
2.11.0



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