[Skiboot] [PATCH 7/9] npu2: Adjust content of the NTL BAR

[Reza Arbab]

On Mon, Jul 17, 2017 at 01:47:17PM +1000, Alistair Popple wrote:
>Similar comment as the GEN-ID ... do we really need different behaviour between
>DD1 & 2?

For bar->size at least, we do. NPU2_NTL_BAR_SIZE is new in DD2.

>On Fri, 14 Jul 2017 10:39:26 AM Reza Arbab wrote:
>> Reflect the changed NTL BAR layout in POWER9 DD2.
>>
>> Cc: Alistair Popple <alistair at popple.id.au>
>> Signed-off-by: Reza Arbab <arbab at linux.vnet.ibm.com>
>> ---
>>  hw/npu2.c           | 18 +++++++++++++++---
>>  include/npu2-regs.h |  8 ++++++--
>>  2 files changed, 21 insertions(+), 5 deletions(-)
>>
>> diff --git a/hw/npu2.c b/hw/npu2.c
>> index cba6e3d..d3fa930 100644
>> --- a/hw/npu2.c
>> +++ b/hw/npu2.c
>> @@ -196,9 +196,15 @@ static void npu2_read_bar(struct npu2 *p, struct npu2_bar *bar)
>>  		break;
>>  	case NPU2_NTL0_BAR:
>>  	case NPU2_NTL1_BAR:
>> -		bar->base = GETFIELD(NPU2_NTL_BAR_ADDR, val) << 17;
>> +		if (is_p9dd1()) {
>> +			bar->base = GETFIELD(NPU2_DD1_NTL_BAR_ADDR, val) << 17;
>> +			bar->size = 0x20000;
>> +		} else {
>> +			bar->base = GETFIELD(NPU2_NTL_BAR_ADDR, val) << 16;
>> +			bar->size = 0x10000 << GETFIELD(NPU2_NTL_BAR_SIZE, val);
>> +		}
>> +
>>  		enabled = GETFIELD(NPU2_NTL_BAR_ENABLE, val);
>> -		bar->size = 0x20000;
>>  		break;
>>  	case NPU2_GENID_BAR:
>>  		if (is_p9dd1())
>> @@ -234,7 +240,13 @@ static void npu2_write_bar(struct npu2 *p,
>>  		break;
>>  	case NPU2_NTL0_BAR:
>>  	case NPU2_NTL1_BAR:
>> -		val = SETFIELD(NPU2_NTL_BAR_ADDR, 0ul, bar->base >> 17);
>> +		if (is_p9dd1()) {
>> +			val = SETFIELD(NPU2_DD1_NTL_BAR_ADDR, 0ul, bar->base >> 17);
>> +		} else {
>> +			val = SETFIELD(NPU2_NTL_BAR_ADDR, 0ul, bar->base >> 16);
>> +			val = SETFIELD(NPU2_NTL_BAR_SIZE, val, 1);
>> +		}
>> +
>>  		val = SETFIELD(NPU2_NTL_BAR_ENABLE, val, enable);
>>  		break;
>>  	case NPU2_GENID_BAR:
>> diff --git a/include/npu2-regs.h b/include/npu2-regs.h
>> index 976adb8..737b380 100644
>> --- a/include/npu2-regs.h
>> +++ b/include/npu2-regs.h
>> @@ -137,8 +137,12 @@ void npu2_write_mask(struct npu2 *p, uint64_t reg, uint64_t val, uint64_t mask);
>>  #define   NPU2_NTL_BAR_ENABLE			PPC_BIT(0)
>>  #define   NPU2_NTL_BAR_GROUP			PPC_BITMASK(3,6)
>>  #define   NPU2_NTL_BAR_CHIP			PPC_BITMASK(7,9)
>> -#define   NPU2_NTL_BAR_NODE_ADDR		PPC_BITMASK(10,34)
>> -#define   NPU2_NTL_BAR_ADDR			PPC_BITMASK(3,34)
>> +#define   NPU2_DD1_NTL_BAR_NODE_ADDR		PPC_BITMASK(10,34)
>> +#define   NPU2_NTL_BAR_NODE_ADDR		PPC_BITMASK(10,35)
>> +#define   NPU2_DD1_NTL_BAR_ADDR			PPC_BITMASK(3,34)
>> +#define   NPU2_NTL_BAR_ADDR			PPC_BITMASK(3,35)
>> +#define   NPU2_NTL_BAR_POISON			PPC_BIT(36)
>> +#define   NPU2_NTL_BAR_SIZE			PPC_BITMASK(39,43)
>>  #define NPU2_PERF_CFG				0x078
>>  #define NPU2_INHIBIT_CFG			0x080
>>  #define NPU2_C_ERR_RPT_MSG0			0x088
>>
>

-- 
Reza Arbab