[Skiboot] [PATCH 13/14] hw/slw: only enable supported STOP states

[Shilpasri G Bhat]

Hi Oliver,

On 01/12/2017 09:24 AM, Oliver O'Halloran wrote:
> This patch adds parsing the ibm,enabled-stop-levels field when building
> the /ibm,opal/power-mgt/ node so that only the STOP levels that have
> been advertised by firmware are used.
> 
> Signed-off-by: Oliver O'Halloran <oohall at gmail.com>
> ---
>  hw/slw.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/hw/slw.c b/hw/slw.c
> index 78a3e37f867a..579c357a952a 100644
> --- a/hw/slw.c
> +++ b/hw/slw.c
> @@ -637,6 +637,7 @@ void add_cpu_idle_state_properties(void)
>  	u64 *pm_ctrl_reg_val_buf;
>  	u64 *pm_ctrl_reg_mask_buf;
>  	u32 supported_states_mask;
> +	u32 stop_levels;
>  
>  	/* Variables to track buffer length */
>  	u8 name_buf_len;
> @@ -676,6 +677,12 @@ void add_cpu_idle_state_properties(void)
>  		states = power9_cpu_idle_states;
>  		nr_states = ARRAY_SIZE(power9_cpu_idle_states);
>  		has_stop_inst = true;
> +
> +		stop_levels = dt_prop_get_u32_def(power_mgt,
> +			"ibm,enabled-stop-levels", 0);
> +		if (!stop_levels)
> +			prerror("SLW: No stop levels available. Power saving is disabled!\n");
> +
>  	} else if (chip->type == PROC_CHIP_P8_MURANO ||
>  	    chip->type == PROC_CHIP_P8_VENICE ||
>  	    chip->type == PROC_CHIP_P8_NAPLES) {
> @@ -754,6 +761,13 @@ void add_cpu_idle_state_properties(void)
>  		if (!(states[i].flags & supported_states_mask))
>  			continue;
>  
> +		/* We can only use the stop levels that HB has made available */
> +		if (has_stop_inst) {
> +			u32 level = 1ul << states[i].pm_ctrl_reg_val;

739063fb706f987df2a766a981abc75053244044 adds other PSSCR fields to
pm_ctrl_reg_val. Can you do the following to extract the relevant bits.

u32 level = 1ul << (states[i].pm_ctrl_reg_val & OPAL_PM_PSSCR_RL_MASK)

Thanks and Regards,
Shilpa

> +			if (!(stop_levels & level))
> +				continue;
> +		}
> +
>  		/*
>  		 * If a state is supported add each of its property
>  		 * to its corresponding property buffer.
>