[Skiboot] [PATCH] slw: use only lite stop states for P9 DD1
Vaidyanathan Srinivasan
svaidy at linux.vnet.ibm.com
Sat Feb 18 04:37:38 AEDT 2017
From: Shilpasri G Bhat <shilpa.bhat at linux.vnet.ibm.com>
POWER9 DD1 chip can work with lite stop states now. These
STOP states have ESL=EC=0 and provide fast entry/exit.
Signed-off-by: Shilpasri G Bhat <shilpa.bhat at linux.vnet.ibm.com>
Signed-off-by: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
---
hw/slw.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/hw/slw.c b/hw/slw.c
index 81e4e4a..2415019 100644
--- a/hw/slw.c
+++ b/hw/slw.c
@@ -649,6 +649,8 @@ void add_cpu_idle_state_properties(void)
u32 *residency_ns_buf;
u32 *flags_buf;
+ bool only_lite = false;
+
prlog(PR_DEBUG, "CPU idle state device tree init\n");
/* Create /ibm,opal/power-mgt if it doesn't exist already */
@@ -683,6 +685,9 @@ void add_cpu_idle_state_properties(void)
if (!stop_levels)
prerror("SLW: No stop levels available. Power saving is disabled!\n");
+ /* Force only lite states for DD1.0 */
+ if (chip->ec_level == 0x10)
+ only_lite = true;
} else if (chip->type == PROC_CHIP_P8_MURANO ||
chip->type == PROC_CHIP_P8_VENICE ||
chip->type == PROC_CHIP_P8_NAPLES) {
@@ -757,10 +762,15 @@ void add_cpu_idle_state_properties(void)
supported_states_mask |= OPAL_PM_WINKLE_ENABLED;
}
for (i = 0; i < nr_states; i++) {
+ u64 esl = states[i].pm_ctrl_reg_val & OPAL_PM_PSSCR_ESL;
+
/* For each state, check if it is one of the supported states. */
if (!(states[i].flags & supported_states_mask))
continue;
+ if (only_lite && esl)
+ continue;
+
/* We can only use the stop levels that HB has made available */
if (has_stop_inst) {
u32 level = 31 - (states[i].pm_ctrl_reg_val &
@@ -770,6 +780,8 @@ void add_cpu_idle_state_properties(void)
continue;
}
+ prlog(PR_NOTICE, "SLW: Enabling: %s\n", states[i].name);
+
/*
* If a state is supported add each of its property
* to its corresponding property buffer.
--
2.9.3
More information about the Skiboot
mailing list