[Skiboot] [PATCH v2 0/5] Support SRIOV Capability

Gavin Shan gwshan at linux.vnet.ibm.com
Fri Feb 10 12:19:57 AEDT 2017

This feature was inspired from one issue discussed with Carol. On Mellanox
connect-3 adapter, the MPS values for PF and VF are mismatched. It's usually
leading to EEH error, but we don't. It turns to be the MPS field in VF's
config register is readonly. In order to avoid confusion, we need to emulate
the MPS field (in config space). Prior to that, we need support SRIOV capability
first to create or destroy PCI devices when it's enabled or disabled.

Without this feature lost in skiboot, the kernel has to take care of all SRIOV
and hardware related details, which actually should be covered in skiboot. EEH
subsystem in Linux kernel will benefit from this for sure: No device reinitialization
and MPS reconfiguration are needed in kerenel.

   * Fix misc comments from Russell

Gavin Shan (5):
  core/pci: Introduce separate function to initialize PCIe capability
  core/pci: Initialize AER capability in PCI core
  core/pci: Allow associating parameter with capability
  hw/phb3: Apply config register filter after HW change
  core/pci: Support SRIOV VFs

 core/Makefile.inc |   4 +-
 core/pci-iov.c    | 257 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 core/pci.c        | 134 +++++++++++++++++-----------
 hw/p7ioc-phb.c    |  19 +---
 hw/phb3.c         |  25 ++----
 hw/phb4.c         |  19 +---
 include/pci-cfg.h |  32 +++++++
 include/pci-iov.h |  37 ++++++++
 include/pci.h     |  28 ++++--
 9 files changed, 442 insertions(+), 113 deletions(-)
 create mode 100644 core/pci-iov.c
 create mode 100644 include/pci-iov.h


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