[Skiboot] [PATCH v4 0/5] Enable VAS

[Sukadev Bhattiprolu]

Stewart, Balbir,

Can you please let me know of any comments on these patches?

Thanks,

Sukadev

Sukadev Bhattiprolu [sukadev at linux.vnet.ibm.com] wrote:
> Power9 introduces a hardware subsystem referred to as the Virtual
> Accelerator Switchboard (VAS). VAS allows kernel subsystems and user
> space processes to directly access the Nest Accelerator (NX) engines
> which implement compression and encryption algorithms in the hardware.
> 
> NX has been in Power processors since Power7+, but access to the NX
> engines was through the 'icswx' instruction which is only available
> to the kernel/hypervisor. Starting with Power9, access to the NX
> engines is provided to both kernel and user space processes through
> VAS.
> 
> The switchboard (i.e VAS) multiplexes accesses between "receivers" and
> "senders", where the "receivers" are typically the NX engines and
> "senders" are the kernel subsystems and user processors that wish to
> access the receivers (NX engines).  Once a sender is "connected" to 
> a receiver through the switchboard, the sender can submit compression/
> encryption requests to the hardware using the new (in PowerISA 3.0)
> "copy" and "paste" instructions.
> 
> In the initial OPAL and PowerNV kernel patchsets, the "senders" can
> only be kernel subsystems (i.e NX-842 driver). A follow-on patch set
> will allow senders to be user-space processes.
> 
> This OPAL patch set initializes the VAS registers and makes the VAS
> hardware available to the NX-842 driver in the kernel. It also provides
> some interfaces that the NX-842 subsystem in OPAL needs to initialize
> the NX hardware in Power9.
> 
> This patchset has been tested in a Simics Power9 environment using:
> 	- the corresponding VAS kernel patchset [1]
> 	- modified NX-842 OPAL and kernel drivers, and
> 	- a compression self-test module from Power8.
> 
> A newer version of the VAS kernel patchset, as well as the OPAL and
> kernel patchsets for NX-842 driver will be posted separately. All four
> are needed to effectively use VAS/NX in Power9.
> 
> Thanks to Haren Myneni for the NX-842 modifications and help with
> testing, Ben Herrenschmidt for the interface to retrieve an IPI
> trigger port, Ben, Michael Ellerman and Michael Neuling for input
> on working with the hardware.
> 
> [1] RFC version of VAS kernel patch set:
>     https://lists.ozlabs.org/pipermail/linuxppc-dev/2016-November/150854.html
> 
> Changelog[v4]
> 	- Comments from Balbir: Made some functions inline; added some device
> 	  tree nodes
> 	- Dropped the patch to allocate/return IRQ ports for now. Will
> 	  repost the patch later.
> 
> Changelog[v3]
>        - [Oliver O'Halloran] Fold changes to vas.c and Makefile.inc from
>                 patch 1 into current patch; use constant 'true' for the
>                 (unnecessary) macros that were removed by earlier patch;
>                 free wcbs memory if any chip fails initialization;use
>                 prolog()/prerror() instead of printf; Use out_be64() to
>                 write to the MMIO address
> 
>        - [Oliver O'Halloran, Alistair Popple] Use proc_gen to check for P9
> 
> Changelog[v2]
> 	- Drop BenH's patch (interface to retrieve IPI trigger port) from
> 	  this set since it has been merged into skiboot.
> 	- Minor code reorg to address Alistair Popple's comment (Patch 5).
> 
> 
> 
> Sukadev Bhattiprolu (5):
>   VAS: Define macros needed by VAS
>   VAS: Initialize the basic VAS internal registers
>   VAS: Define vas_get_hvwc_mmio_bar interface
>   VAS: Define vas_get_wcbs_bar interface
>   VAS: Define OPAL_VAS_READ_FIR interface
> 
>  core/Makefile.inc  |   2 +-
>  core/init.c        |   4 +
>  core/vas.c         | 329 +++++++++++++++++++++++++++++++++++++++++++++++++++++
>  include/chip.h     |   2 +
>  include/opal-api.h |   3 +-
>  include/vas.h      | 158 +++++++++++++++++++++++++
>  6 files changed, 496 insertions(+), 2 deletions(-)
>  create mode 100644 core/vas.c
>  create mode 100644 include/vas.h
> 
> -- 
> 2.7.4
> 
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