[Skiboot] [PATCH] slw: Fix parsing of supported STOP states

[Oliver O'Halloran]

On Mon, Feb 6, 2017 at 8:55 PM, Shilpasri G Bhat
<shilpa.bhat at linux.vnet.ibm.com> wrote:
> Bits[0-15] are used to indicate the supported STOP states in
> "ibm,enabled-stop-levels" DT property and STOP0 is starting from
> Bit0. This patch fixes the parsing to read the appropriate bits.
>
> Fixes: c3ea33f173ec ("hw/slw: only enable supported STOP states")
> Signed-off-by: Shilpasri G Bhat <shilpa.bhat at linux.vnet.ibm.com>
> ---
>  hw/slw.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/hw/slw.c b/hw/slw.c
> index 342b91f..81e4e4a 100644
> --- a/hw/slw.c
> +++ b/hw/slw.c
> @@ -763,8 +763,10 @@ void add_cpu_idle_state_properties(void)
>
>                 /* We can only use the stop levels that HB has made available */
>                 if (has_stop_inst) {
> -                       u32 level = 1ul << states[i].pm_ctrl_reg_val;
> -                       if (!(stop_levels & level))
> +                       u32 level = 31 - (states[i].pm_ctrl_reg_val &
> +                                        OPAL_PM_PSSCR_RL_MASK);
> +
> +                       if (!(stop_levels & (1ul << level)))
>                                 continue;
>                 }
>
> --
> 1.8.3.1
>

IBM bit ordering strikes again ;)

Thanks for catching this.

Reviewed-by: Oliver O'Halloran <oohall at gmail.com>