[Skiboot] [PATCH v3 2/4] ast-bmc: Use the mbox driver

Suraj Jitindar Singh sjitindarsingh at gmail.com
Mon Feb 6 16:55:07 AEDT 2017


On Thu, 2017-02-02 at 17:54 +1100, Cyril Bur wrote:
> The mbox registers are accessed via superIO, these need to be
> initialised.
> The mbox device node won't be present in the device tree hostboot
> passes
> us, so fixup the device tree.
> 
> Signed-off-by: Cyril Bur <cyril.bur at au1.ibm.com>
> ---
>  hw/ast-bmc/ast-io.c       | 19 +++++++++++++++++++
>  include/ast.h             |  3 +++
>  platforms/astbmc/common.c | 38
> ++++++++++++++++++++++++++++++++++++++
>  3 files changed, 60 insertions(+)
> 
> diff --git a/hw/ast-bmc/ast-io.c b/hw/ast-bmc/ast-io.c
> index a3c5c9f7..41234fbb 100644
> --- a/hw/ast-bmc/ast-io.c
> +++ b/hw/ast-bmc/ast-io.c
> @@ -469,3 +469,22 @@ void ast_disable_sio_uart1(void)
>  
>  	bmc_sio_put(true);
>  }
> +
> +void ast_setup_sio_mbox(uint16_t io_base, uint8_t irq)
> +{
> +	bmc_sio_get(BMC_SIO_DEV_MBOX);
> +
> +	/* Disable for configuration */
> +	bmc_sio_outb(0x00, 0x30);
> +
> +	bmc_sio_outb(io_base >> 8, 0x60);
> +	bmc_sio_outb(io_base & 0xff, 0x61);
Technically the lower 5 bits of this are reserved. I assume you only
have down to 32 byte granularity then.
io_base & 0xE0?
> +	bmc_sio_outb(irq, 0x70);
Again, not sure if it matters but "irq & 0x0F"?
> +	bmc_sio_outb(0x01, 0x71); /* level low */
> +
> +	/* Enable MailBox */
> +	bmc_sio_outb(0x01, 0x30);
> +
> +	bmc_sio_put(true);
> +}
> +
> diff --git a/include/ast.h b/include/ast.h
> index c7bf0cb3..43c5989f 100644
> --- a/include/ast.h
> +++ b/include/ast.h
> @@ -85,6 +85,9 @@ void ast_disable_sio_uart1(void);
>  /* BT configuration */
>  void ast_setup_ibt(uint16_t io_base, uint8_t irq);
>  
> +/* MBOX configuration */
> +void ast_setup_sio_mbox(uint16_t io_base, uint8_t irq);
> +
>  #endif /* __SKIBOOT__ */
>  
>  /*
> diff --git a/platforms/astbmc/common.c b/platforms/astbmc/common.c
> index e78b5fa3..5cd72de9 100644
> --- a/platforms/astbmc/common.c
> +++ b/platforms/astbmc/common.c
> @@ -39,6 +39,11 @@
>  #define BT_IO_COUNT	3
>  #define BT_LPC_IRQ	10
>  
> +/* MBOX config */
> +#define MBOX_IO_BASE 0x1000
> +#define MBOX_IO_COUNT 6
> +#define MBOX_LPC_IRQ 9
> +
>  void astbmc_ext_irq_serirq_cpld(unsigned int chip_id)
>  {
>  	lpc_all_interrupts(chip_id);
> @@ -191,6 +196,32 @@ static void astbmc_fixup_dt_bt(struct dt_node
> *lpc)
>  	dt_add_property_cells(bt, "interrupt-parent", lpc->phandle);
>  }
>  
> +static void astbmc_fixup_dt_mbox(struct dt_node *lpc)
> +{
> +	struct dt_node *mbox;
> +	char namebuf[32];
> +
> +	/* First check if the mbox interface is already there */
> +	dt_for_each_child(lpc, mbox) {
> +		if (dt_node_is_compatible(mbox, "mbox"))
> +			return;
> +	}
> +
> +	snprintf(namebuf, sizeof(namebuf), "mbox at i%x",
> MBOX_IO_BASE);
> +	mbox = dt_new(lpc, namebuf);
> +
> +	dt_add_property_cells(mbox, "reg",
> +			      1, /* IO space */
> +			      MBOX_IO_BASE, MBOX_IO_COUNT);
> +	dt_add_property_strings(mbox, "compatible", "mbox");
> +
> +	/* Mark it as reserved to avoid Linux trying to claim it */
> +	dt_add_property_strings(mbox, "status", "reserved");
> +
> +	dt_add_property_cells(mbox, "interrupts", MBOX_LPC_IRQ);
> +	dt_add_property_cells(mbox, "interrupt-parent", lpc-
> >phandle);
> +}
> +
>  static void astbmc_fixup_dt_uart(struct dt_node *lpc)
>  {
>  	/*
> @@ -288,6 +319,9 @@ static void astbmc_fixup_dt(void)
>  	/* BT is not in HB either */
>  	astbmc_fixup_dt_bt(primary_lpc);
>  
> +	/* MBOX is not in HB */
> +	astbmc_fixup_dt_mbox(primary_lpc);
> +
>  	/* The pel logging code needs a system-id property to work
> so
>  	   make sure we have one. */
>  	astbmc_fixup_dt_system_id();
> @@ -357,9 +391,13 @@ void astbmc_early_init(void)
>  	/* Similarly, some BMCs don't configure the BT interrupt
> properly */
>  	ast_setup_ibt(BT_IO_BASE, BT_LPC_IRQ);
>  
> +	ast_setup_sio_mbox(MBOX_IO_BASE, MBOX_LPC_IRQ);
> +
>  	/* Setup UART and use it as console */
>  	uart_init();
>  
> +	mbox_init();
> +
>  	prd_init();
>  }
> 
Everything else looks good.

Reviewed-by: Suraj Jitindar Singh <sjitindarsingh at gmail.com>


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