[Skiboot] [PATCH 4/6] xive: Use io_complete() when changing the ESB mask bits

[Oliver]

On Fri, Dec 8, 2017 at 4:48 AM, Benjamin Herrenschmidt
<benh at kernel.crashing.org> wrote:
> On Thu, 2017-12-07 at 12:47 +1100, Oliver wrote:
>> On Thu, Dec 7, 2017 at 4:39 AM, Benjamin Herrenschmidt
>> <benh at kernel.crashing.org> wrote:
>> > Thus ensuring that the load has completed before anything else
>> > is done (ie, the interrupt is actually masked).
>> >
>> > Signed-off-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>
>> > ---
>> >  hw/xive.c | 2 +-
>> >  1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/hw/xive.c b/hw/xive.c
>> > index 76939b79..104e1e85 100644
>> > --- a/hw/xive.c
>> > +++ b/hw/xive.c
>> > @@ -2451,7 +2451,7 @@ static void xive_update_irq_mask(struct xive_src *s, uint32_t idx, bool masked)
>> >         if (s->flags & XIVE_SRC_SHIFT_BUG)
>> >                 offset <<= 4;
>> >
>> > -       in_be64(mmio_base + offset);
>> > +       in_complete(in_be64(mmio_base + offset));
>>
>> Can you elaborate a bit of what this is doing an why it needs to be done?
>
> Well, the cset says it :-) Basically the twi/isync construct is the
> same we use in the kernel in every in_* and it's supposed to make
> the processor "consume" the load, and not execute past the isync until
> the load value has returned.

Sure, but why is this necessary/preferable to, say, an eieio barrier?

>
> Ben.
>
>>
>> >  }
>> >
>> >  static int64_t xive_sync(struct xive *x)
>> > --
>> > 2.14.3
>> >
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>>
>> Tested-by: Oliver O'Halloran <oohall at gmail.com>