[Skiboot] [PATCH 00/16] PCI Surprise Hotplug Support

[Gavin Shan]

This series of patches supports PCI surprise hotplug. The functionality
relies on PCI slot presence and link state change reporting event. When
surprise hotplug has been claimed on the slot through device-tree property
"ibm,slot-surprise-pluggable", we have to keep slot's power supply always
on. Otherwise, the required events won't be raised properly. The code changes
were tested on Firestone+{Sumsung NVMe Adapter, Memblaze NVMe Adapter} when
the PCI adapters seat behind PLX or PMC PCIe switch downstream port.

PATCH[1-4] supports dynamic PCIe slots on openPower platforms. It's requested
from customer who inserts a PMC PCIe switch behind PHB direct slot in order to
evaluate its functionality. Those patches populate PCIe slots on the PMC PCIe
switch downstream ports and their labels ("S<domain><bus_num>") are populated
dynamically.

PATCH[5-12] are preparation for PCI surprise hotplug support by fixing couple
of issues: Use the cached power state; Find the associated PCI slot before
applying quirk; Reserve PCI buses on the root port when there is nothing
connected. 

PATCH[13-15] claims PCI surprise hotplug capability on the PCI slot when
it's supported in PCI slot capability (in PCIe capability) or link state
change reporting is claimed. The surprise link down event on the PCI slot
shouldn't cause a EEH error when the PCI slot supports surprise hotplug.

PATCH[16] fixes a bug. We have to disable ECRC functionality when BCM57800
seats behind PMC PCIe switch. Otherwise, the adapter cannot be probed by
PCI subsystem successfully.

Gavin Shan (16):
  platforms/astbmc: Fix coding style for slot_table_get_slot_info()
  platforms/astbmc: ibm,slot-label not depend on ibm,slot-location-code
  platforms/astbmc: Introduce helper function slot_init_info()
  platforms/astbmc: Support dynamic PCI slot
  core/pci: Output CRS retry times
  core/pci: Fix PCIe slot power state
  core/pci: Return error on invalid power state transition
  core/pci: Cache power state on slot without power control
  core/pci: Return slot cached power state
  core/pci: Update PCI topology after power change
  core/pci: Get PCI slot before applying quirk
  core/pci: Reserve PCI buses for RC's slot
  core/pci: Claim surprise hotplug capability
  hw/phb3: Disable surprise link down event on PCI slots
  hw/phb3: Override root slot's prepare_link_change() with PHB's
  hw/phb3: Disable ECRC on Broadcom adapter behind PMC switch

 core/pci-opal.c                 | 20 ++++++---
 core/pci-slot.c                 | 26 +++++++----
 core/pci.c                      | 47 +++++++++++++-------
 core/pcie-slot.c                | 79 ++++++++++++++++++++++++++-------
 hw/phb3.c                       | 88 +++++++++++++++++++++++++++++++-----
 include/pci-slot.h              |  1 +
 platforms/astbmc/slots.c        | 98 ++++++++++++++++++++++++++++++++++-------
 platforms/ibm-fsp/firenze-pci.c | 10 +++++
 8 files changed, 296 insertions(+), 73 deletions(-)

-- 
2.1.0