[Skiboot] [PATCH 2/2] pci: Remove obsoleted PCI slot pfreset() operation

Gavin Shan gwshan at linux.vnet.ibm.com
Thu Oct 20 14:17:18 AEDT 2016


PCI slot pfreset() operation is obsoleted as nobody uses it. This
removes it and the related PCI slot states. No functional changes
introduced.

Signed-off-by: Gavin Shan <gwshan at linux.vnet.ibm.com>
---
 core/pci-slot.c                 |  3 ---
 core/pcie-slot.c                |  1 -
 doc/pci-slot.rst                |  1 -
 hw/npu.c                        |  1 -
 hw/p7ioc-phb.c                  |  6 ------
 hw/phb3.c                       | 31 +++++++++++++++----------------
 hw/phb4.c                       | 31 +++++++++++++++----------------
 include/p7ioc.h                 |  2 --
 include/pci-slot.h              | 11 ++++-------
 include/phb3.h                  |  6 ++----
 include/phb4.h                  |  6 ++----
 platforms/ibm-fsp/firenze-pci.c |  2 --
 12 files changed, 38 insertions(+), 63 deletions(-)

diff --git a/core/pci-slot.c b/core/pci-slot.c
index aa4bea6..075b34c 100644
--- a/core/pci-slot.c
+++ b/core/pci-slot.c
@@ -97,9 +97,6 @@ static int64_t pci_slot_sm_poll(struct pci_slot *slot)
 	case PCI_SLOT_STATE_FRESET:
 		ret = slot->ops.freset(slot);
 		break;
-	case PCI_SLOT_STATE_PFRESET:
-		ret = slot->ops.pfreset(slot);
-		break;
 	case PCI_SLOT_STATE_CRESET:
 		ret = slot->ops.creset(slot);
 		break;
diff --git a/core/pcie-slot.c b/core/pcie-slot.c
index 2484570..f9bef64 100644
--- a/core/pcie-slot.c
+++ b/core/pcie-slot.c
@@ -491,7 +491,6 @@ struct pci_slot *pcie_slot_create(struct phb *phb, struct pci_device *pd)
 	slot->ops.poll_link             = pcie_slot_sm_poll_link;
 	slot->ops.hreset                = pcie_slot_sm_hreset;
 	slot->ops.freset                = pcie_slot_sm_freset;
-	slot->ops.pfreset               = NULL;
 
 	return slot;
 }
diff --git a/doc/pci-slot.rst b/doc/pci-slot.rst
index e76fba1..a095737 100644
--- a/doc/pci-slot.rst
+++ b/doc/pci-slot.rst
@@ -46,7 +46,6 @@ prepare_link_change   Prepare PCIE link status change
 poll_link             Poll PCIE link until it's up or down permanently
 creset                Complete reset, only available to PHB slot
 freset                Fundamental reset
-pfreset               Post fundamental reset
 hreset                Hot reset
 poll                  Interface for OPAL API to drive internal state machine
 
diff --git a/hw/npu.c b/hw/npu.c
index 685acc6..5232954 100644
--- a/hw/npu.c
+++ b/hw/npu.c
@@ -850,7 +850,6 @@ static struct pci_slot *npu_slot_create(struct phb *phb)
 	slot->ops.poll_link           = NULL;
 	slot->ops.hreset              = npu_hreset;
 	slot->ops.freset              = npu_freset;
-	slot->ops.pfreset             = NULL;
 	slot->ops.creset              = NULL;
 
 	return slot;
diff --git a/hw/p7ioc-phb.c b/hw/p7ioc-phb.c
index 1f1b362..50608e2 100644
--- a/hw/p7ioc-phb.c
+++ b/hw/p7ioc-phb.c
@@ -2228,11 +2228,6 @@ static int64_t p7ioc_freset(struct pci_slot *slot)
 		reg64 = in_be64(p->regs + PHB_RESET);
 		reg64 |= 0x2000000000000000ul;
 		out_be64(p->regs + PHB_RESET, reg64);
-		if (slot->ops.pfreset) {
-			pci_slot_set_state(slot,
-					   P7IOC_SLOT_PFRESET_START);
-			return slot->ops.pfreset(slot);
-		}
 
 		pci_slot_set_state(slot, P7IOC_SLOT_LINK_START);
 		return slot->ops.poll_link(slot);
@@ -2321,7 +2316,6 @@ static struct pci_slot *p7ioc_phb_slot_create(struct phb *phb)
 	slot->ops.poll_link            = p7ioc_poll_link;
 	slot->ops.hreset               = p7ioc_hreset;
 	slot->ops.freset               = p7ioc_freset;
-	slot->ops.pfreset              = NULL;
 	slot->ops.creset               = p7ioc_creset;
 
 	return slot;
diff --git a/hw/phb3.c b/hw/phb3.c
index 1c09ffe..52b30c2 100644
--- a/hw/phb3.c
+++ b/hw/phb3.c
@@ -2261,7 +2261,7 @@ static int64_t phb3_hreset(struct pci_slot *slot)
 	return OPAL_HARDWARE;
 }
 
-static int64_t phb3_pfreset(struct pci_slot *slot)
+static int64_t phb3_freset(struct pci_slot *slot)
 {
 	struct phb3 *p = phb_to_phb3(slot->phb);
 	uint8_t presence = 1;
@@ -2269,48 +2269,48 @@ static int64_t phb3_pfreset(struct pci_slot *slot)
 
 	switch(slot->state) {
 	case PHB3_SLOT_NORMAL:
-		PHBDBG(p, "PFRESET: Starts\n");
+		PHBDBG(p, "FRESET: Starts\n");
 
 		/* Nothing to do without adapter connected */
 		if (slot->ops.get_presence_state)
 			slot->ops.get_presence_state(slot, &presence);
 		if (!presence) {
-			PHBDBG(p, "PFRESET: No device\n");
+			PHBDBG(p, "FRESET: No device\n");
 			return OPAL_SUCCESS;
 		}
 
-		PHBDBG(p, "PFRESET: Prepare for link down\n");
-		slot->retry_state = PHB3_SLOT_PFRESET_START;
+		PHBDBG(p, "FRESET: Prepare for link down\n");
+		slot->retry_state = PHB3_SLOT_FRESET_START;
 		if (slot->ops.prepare_link_change)
 			slot->ops.prepare_link_change(slot, false);
 		/* fall through */
-	case PHB3_SLOT_PFRESET_START:
+	case PHB3_SLOT_FRESET_START:
 		if (!p->skip_perst) {
-			PHBDBG(p, "PFRESET: Assert\n");
+			PHBDBG(p, "FRESET: Assert\n");
 			reg = in_be64(p->regs + PHB_RESET);
 			reg &= ~0x2000000000000000ul;
 			out_be64(p->regs + PHB_RESET, reg);
 			pci_slot_set_state(slot,
-				PHB3_SLOT_PFRESET_ASSERT_DELAY);
+				PHB3_SLOT_FRESET_ASSERT_DELAY);
 			return pci_slot_set_sm_timeout(slot, secs_to_tb(1));
 		}
 
 		/* To skip the assert during boot time */
-		PHBDBG(p, "PFRESET: Assert skipped\n");
-		pci_slot_set_state(slot, PHB3_SLOT_PFRESET_ASSERT_DELAY);
+		PHBDBG(p, "FRESET: Assert skipped\n");
+		pci_slot_set_state(slot, PHB3_SLOT_FRESET_ASSERT_DELAY);
 		p->skip_perst = false;
 		/* fall through */
-	case PHB3_SLOT_PFRESET_ASSERT_DELAY:
-		PHBDBG(p, "PFRESET: Deassert\n");
+	case PHB3_SLOT_FRESET_ASSERT_DELAY:
+		PHBDBG(p, "FRESET: Deassert\n");
 		reg = in_be64(p->regs + PHB_RESET);
 		reg |= 0x2000000000000000ul;
 		out_be64(p->regs + PHB_RESET, reg);
 		pci_slot_set_state(slot,
-			PHB3_SLOT_PFRESET_DEASSERT_DELAY);
+			PHB3_SLOT_FRESET_DEASSERT_DELAY);
 
 		/* CAPP FPGA requires 1s to flash before polling link */
 		return pci_slot_set_sm_timeout(slot, secs_to_tb(1));
-	case PHB3_SLOT_PFRESET_DEASSERT_DELAY:
+	case PHB3_SLOT_FRESET_DEASSERT_DELAY:
 		pci_slot_set_state(slot, PHB3_SLOT_LINK_START);
 		return slot->ops.poll_link(slot);
 	default:
@@ -2595,8 +2595,7 @@ static struct pci_slot *phb3_slot_create(struct phb *phb)
 	slot->ops.prepare_link_change	= phb3_prepare_link_change;
 	slot->ops.poll_link		= phb3_poll_link;
 	slot->ops.hreset		= phb3_hreset;
-	slot->ops.freset		= phb3_pfreset;
-	slot->ops.pfreset		= phb3_pfreset;
+	slot->ops.freset		= phb3_freset;
 	slot->ops.creset		= phb3_creset;
 
 	return slot;
diff --git a/hw/phb4.c b/hw/phb4.c
index efb6a5f..a21aa1a 100644
--- a/hw/phb4.c
+++ b/hw/phb4.c
@@ -1901,7 +1901,7 @@ static int64_t phb4_hreset(struct pci_slot *slot)
 	return OPAL_HARDWARE;
 }
 
-static int64_t phb4_pfreset(struct pci_slot *slot)
+static int64_t phb4_freset(struct pci_slot *slot)
 {
 	struct phb4 *p = phb_to_phb4(slot->phb);
 	uint8_t presence = 1;
@@ -1909,48 +1909,48 @@ static int64_t phb4_pfreset(struct pci_slot *slot)
 
 	switch(slot->state) {
 	case PHB4_SLOT_NORMAL:
-		PHBDBG(p, "PFRESET: Starts\n");
+		PHBDBG(p, "FRESET: Starts\n");
 
 		/* Nothing to do without adapter connected */
 		if (slot->ops.get_presence_state)
 			slot->ops.get_presence_state(slot, &presence);
 		if (!presence) {
-			PHBDBG(p, "PFRESET: No device\n");
+			PHBDBG(p, "FRESET: No device\n");
 			return OPAL_SUCCESS;
 		}
 
-		PHBDBG(p, "PFRESET: Prepare for link down\n");
-		slot->retry_state = PHB4_SLOT_PFRESET_START;
+		PHBDBG(p, "FRESET: Prepare for link down\n");
+		slot->retry_state = PHB4_SLOT_FRESET_START;
 		if (slot->ops.prepare_link_change)
 			slot->ops.prepare_link_change(slot, false);
 		/* fall through */
-	case PHB4_SLOT_PFRESET_START:
+	case PHB4_SLOT_FRESET_START:
 		if (!p->skip_perst) {
-			PHBDBG(p, "PFRESET: Assert\n");
+			PHBDBG(p, "FRESET: Assert\n");
 			reg = in_be64(p->regs + PHB_PCIE_CRESET);
 			reg &= ~PHB_PCIE_CRESET_PERST_N;
 			out_be64(p->regs + PHB_PCIE_CRESET, reg);
 			pci_slot_set_state(slot,
-				PHB4_SLOT_PFRESET_ASSERT_DELAY);
+				PHB4_SLOT_FRESET_ASSERT_DELAY);
 			return pci_slot_set_sm_timeout(slot, secs_to_tb(1));
 		}
 
 		/* To skip the assert during boot time */
-		PHBDBG(p, "PFRESET: Assert skipped\n");
-		pci_slot_set_state(slot, PHB4_SLOT_PFRESET_ASSERT_DELAY);
+		PHBDBG(p, "FRESET: Assert skipped\n");
+		pci_slot_set_state(slot, PHB4_SLOT_FRESET_ASSERT_DELAY);
 		p->skip_perst = false;
 		/* fall through */
-	case PHB4_SLOT_PFRESET_ASSERT_DELAY:
-		PHBDBG(p, "PFRESET: Deassert\n");
+	case PHB4_SLOT_FRESET_ASSERT_DELAY:
+		PHBDBG(p, "FRESET: Deassert\n");
 		reg = in_be64(p->regs + PHB_PCIE_CRESET);
 		reg |= PHB_PCIE_CRESET_PERST_N;
 		out_be64(p->regs + PHB_PCIE_CRESET, reg);
 		pci_slot_set_state(slot,
-			PHB4_SLOT_PFRESET_DEASSERT_DELAY);
+			PHB4_SLOT_FRESET_DEASSERT_DELAY);
 
 		/* CAPP FPGA requires 1s to flash before polling link */
 		return pci_slot_set_sm_timeout(slot, secs_to_tb(1));
-	case PHB4_SLOT_PFRESET_DEASSERT_DELAY:
+	case PHB4_SLOT_FRESET_DEASSERT_DELAY:
 		pci_slot_set_state(slot, PHB4_SLOT_LINK_START);
 		return slot->ops.poll_link(slot);
 	default:
@@ -2035,8 +2035,7 @@ static struct pci_slot *phb4_slot_create(struct phb *phb)
 	slot->ops.prepare_link_change	= phb4_prepare_link_change;
 	slot->ops.poll_link		= phb4_poll_link;
 	slot->ops.hreset		= phb4_hreset;
-	slot->ops.freset		= phb4_pfreset;
-	slot->ops.pfreset		= phb4_pfreset;
+	slot->ops.freset		= phb4_freset;
 	slot->ops.creset		= phb4_creset;
 
 	return slot;
diff --git a/include/p7ioc.h b/include/p7ioc.h
index ab19945..8040b3a 100644
--- a/include/p7ioc.h
+++ b/include/p7ioc.h
@@ -225,8 +225,6 @@ enum p7ioc_phb_state {
 #define   P7IOC_SLOT_FRESET_POWER_ON	(P7IOC_SLOT_FRESET + 4)
 #define   P7IOC_SLOT_FRESET_ASSERT	(P7IOC_SLOT_FRESET + 5)
 #define   P7IOC_SLOT_FRESET_DEASSERT	(P7IOC_SLOT_FRESET + 6)
-#define P7IOC_SLOT_PFRESET		PCI_SLOT_STATE_PFRESET
-#define   P7IOC_SLOT_PFRESET_START	(P7IOC_SLOT_PFRESET + 1)
 #define P7IOC_SLOT_CRESET		PCI_SLOT_STATE_CRESET
 #define   P7IOC_SLOT_CRESET_START	(P7IOC_SLOT_CRESET + 1)
 
diff --git a/include/pci-slot.h b/include/pci-slot.h
index f7634b8..81a61c3 100644
--- a/include/pci-slot.h
+++ b/include/pci-slot.h
@@ -108,7 +108,6 @@ struct pci_slot_ops {
 	int64_t (*poll_link)(struct pci_slot *slot);
 	int64_t (*creset)(struct pci_slot *slot);
 	int64_t (*freset)(struct pci_slot *slot);
-	int64_t (*pfreset)(struct pci_slot *slot);
 	int64_t (*hreset)(struct pci_slot *slot);
 	int64_t (*poll)(struct pci_slot *slot);
 
@@ -133,16 +132,14 @@ struct pci_slot_ops {
 #define   PCI_SLOT_STATE_HRESET_HOLD		(PCI_SLOT_STATE_HRESET + 2)
 #define PCI_SLOT_STATE_FRESET			0x00000300
 #define   PCI_SLOT_STATE_FRESET_POWER_OFF	(PCI_SLOT_STATE_FRESET + 1)
-#define PCI_SLOT_STATE_PFRESET			0x00000400
-#define   PCI_SLOT_STATE_PFRESET_START		(PCI_SLOT_STATE_PFRESET + 1)
-#define PCI_SLOT_STATE_CRESET			0x00000500
+#define PCI_SLOT_STATE_CRESET			0x00000400
 #define   PCI_SLOT_STATE_CRESET_START		(PCI_SLOT_STATE_CRESET + 1)
-#define PCI_SLOT_STATE_GPOWER			0x00000600
+#define PCI_SLOT_STATE_GPOWER			0x00000500
 #define   PCI_SLOT_STATE_GPOWER_START		(PCI_SLOT_STATE_GPOWER + 1)
-#define PCI_SLOT_STATE_SPOWER			0x00000700
+#define PCI_SLOT_STATE_SPOWER			0x00000600
 #define   PCI_SLOT_STATE_SPOWER_START		(PCI_SLOT_STATE_SPOWER + 1)
 #define   PCI_SLOT_STATE_SPOWER_DONE		(PCI_SLOT_STATE_SPOWER + 2)
-#define PCI_SLOT_STATE_GPRESENCE		0x00000800
+#define PCI_SLOT_STATE_GPRESENCE		0x00000700
 #define   PCI_SLOT_STATE_GPRESENCE_START	(PCI_SLOT_STATE_GPRESENCE + 1)
 
 
diff --git a/include/phb3.h b/include/phb3.h
index dbf3c38..9bedc3a 100644
--- a/include/phb3.h
+++ b/include/phb3.h
@@ -222,10 +222,8 @@ enum phb3_state {
 #define   PHB3_SLOT_HRESET_DELAY2		(PHB3_SLOT_HRESET + 3)
 #define PHB3_SLOT_FRESET			PCI_SLOT_STATE_FRESET
 #define   PHB3_SLOT_FRESET_START		(PHB3_SLOT_FRESET + 1)
-#define PHB3_SLOT_PFRESET			PCI_SLOT_STATE_PFRESET
-#define   PHB3_SLOT_PFRESET_START		(PHB3_SLOT_PFRESET + 1)
-#define   PHB3_SLOT_PFRESET_ASSERT_DELAY	(PHB3_SLOT_PFRESET + 2)
-#define   PHB3_SLOT_PFRESET_DEASSERT_DELAY	(PHB3_SLOT_PFRESET + 3)
+#define   PHB3_SLOT_FRESET_ASSERT_DELAY		(PHB3_SLOT_FRESET + 2)
+#define   PHB3_SLOT_FRESET_DEASSERT_DELAY	(PHB3_SLOT_FRESET + 3)
 #define PHB3_SLOT_CRESET			PCI_SLOT_STATE_CRESET
 #define   PHB3_SLOT_CRESET_START		(PHB3_SLOT_CRESET + 1)
 #define   PHB3_SLOT_CRESET_WAIT_CQ		(PHB3_SLOT_CRESET + 2)
diff --git a/include/phb4.h b/include/phb4.h
index fb23d0f..2753496 100644
--- a/include/phb4.h
+++ b/include/phb4.h
@@ -183,10 +183,8 @@ enum phb4_state {
 #define   PHB4_SLOT_HRESET_DELAY2		(PHB4_SLOT_HRESET + 3)
 #define PHB4_SLOT_FRESET			PCI_SLOT_STATE_FRESET
 #define   PHB4_SLOT_FRESET_START		(PHB4_SLOT_FRESET + 1)
-#define PHB4_SLOT_PFRESET			PCI_SLOT_STATE_PFRESET
-#define   PHB4_SLOT_PFRESET_START		(PHB4_SLOT_PFRESET + 1)
-#define   PHB4_SLOT_PFRESET_ASSERT_DELAY	(PHB4_SLOT_PFRESET + 2)
-#define   PHB4_SLOT_PFRESET_DEASSERT_DELAY	(PHB4_SLOT_PFRESET + 3)
+#define   PHB4_SLOT_FRESET_ASSERT_DELAY		(PHB4_SLOT_FRESET + 2)
+#define   PHB4_SLOT_FRESET_DEASSERT_DELAY	(PHB4_SLOT_FRESET + 3)
 #define PHB4_SLOT_CRESET			PCI_SLOT_STATE_CRESET
 #define   PHB4_SLOT_CRESET_START		(PHB4_SLOT_CRESET + 1)
 #define   PHB4_SLOT_CRESET_WAIT_CQ		(PHB4_SLOT_CRESET + 2)
diff --git a/platforms/ibm-fsp/firenze-pci.c b/platforms/ibm-fsp/firenze-pci.c
index ff14a4c..1b8b5dc 100644
--- a/platforms/ibm-fsp/firenze-pci.c
+++ b/platforms/ibm-fsp/firenze-pci.c
@@ -53,8 +53,6 @@
 #define   FIRENZE_PCI_SLOT_FRESET_POWER_ON	(FIRENZE_PCI_SLOT_FRESET + 6)
 #define   FIRENZE_PCI_SLOT_PERST_DEASSERT	(FIRENZE_PCI_SLOT_FRESET + 7)
 #define   FIRENZE_PCI_SLOT_PERST_DELAY		(FIRENZE_PCI_SLOT_FRESET + 8)
-#define FIRENZE_PCI_SLOT_PFRESET		PCI_SLOT_STATE_PFRESET
-#define   FIRENZE_PCI_SLOT_PFRESET_START	(FIRENZE_PCI_SLOT_PFRESET + 1)
 #define FIRENZE_PCI_SLOT_GPOWER			PCI_SLOT_STATE_GPOWER
 #define   FIRENZE_PCI_SLOT_GPOWER_START		(FIRENZE_PCI_SLOT_GPOWER + 1)
 #define FIRENZE_PCI_SLOT_SPOWER			PCI_SLOT_STATE_SPOWER
-- 
2.1.0



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