[Skiboot] [PATCH v3 3/9] core/pci: Return slot cached power state

[Gavin Shan]

We should return cached power state instead of retrieving it from
hardware, meaning we're allowed to have the situation: the power
is off in software, but it's on in hardware when the built-in
power control functionality is ignored for some reasons (e.g.
surprise hotplug support). Otherwise, the adapter behind the
slot won't be probed in PCI hot add path.

This returns the cached power state so that OS sees synchronised
power and PCI slot hotplug state (added/removed).

Signed-off-by: Gavin Shan <gwshan at linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan at au1.ibm.com>
---
 core/pcie-slot.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/core/pcie-slot.c b/core/pcie-slot.c
index 711e2e2..fed3462 100644
--- a/core/pcie-slot.c
+++ b/core/pcie-slot.c
@@ -90,11 +90,15 @@ static int64_t pcie_slot_get_link_state(struct pci_slot *slot,
 static int64_t pcie_slot_get_power_state(struct pci_slot *slot __unused,
 					 uint8_t *val)
 {
-	/* The power is always on if no functionality is supported */
-	if (!(slot->slot_cap & PCICAP_EXP_SLOTCAP_PWCTRL))
-		*val = PCI_SLOT_POWER_ON;
-	else
-		*val = slot->power_state;
+	/* We should return the cached power state that is same to
+	 * the PCI slot hotplug state (added/removed). Otherwise,
+	 * the OS will see mismatched states, causing the adapter
+	 * behind the slot can't be probed successfully on request
+	 * of hot add. So we could run into the situation where the
+	 * OS sees power-off but it's on in hardware.
+	 */
+	*val = slot->power_state;
+
 	return OPAL_SUCCESS;
 }
 
-- 
2.1.0