[Skiboot] [PATCH v3 2/9] core/pci: Cache power state on slot without power control

[Gavin Shan]

We can have PCI slots where the mandatory power functionality isn't
supported. On those PCI slots,  we should update (cache) the slot's
power state unconditionally because the power state reflects slot's
hotplug state (added or removed). Without this fix, the power and
slot's hotplug state are mismatched on openPower machines. FSP-based
machines don't have the issue.

Signed-off-by: Gavin Shan <gwshan at linux.vnet.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan at au1.ibm.com>
---
 core/pcie-slot.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/core/pcie-slot.c b/core/pcie-slot.c
index 7fe3785..711e2e2 100644
--- a/core/pcie-slot.c
+++ b/core/pcie-slot.c
@@ -202,9 +202,13 @@ static int64_t pcie_slot_set_power_state(struct pci_slot *slot, uint8_t val)
 	if (slot->power_state == val)
 		return OPAL_PARAMETER;
 
-	/* Drop the request if functionality doesn't exist */
-	if (!(slot->slot_cap & PCICAP_EXP_SLOTCAP_PWCTRL))
+	/* Update the power state and return immediately if the power
+	 * control functionality isn't supported on the PCI slot.
+	 */
+	if (!(slot->slot_cap & PCICAP_EXP_SLOTCAP_PWCTRL)) {
+		slot->power_state = val;
 		return OPAL_SUCCESS;
+	}
 
 	pci_slot_set_state(slot, PCI_SLOT_STATE_SPOWER_START);
 	slot->power_state = val;
-- 
2.1.0