[Skiboot] [PATCH 09/32] xive: Add opal_xive_get_irq_info()
Benjamin Herrenschmidt
benh at kernel.crashing.org
Tue Nov 22 13:13:11 AEDT 2016
Signed-off-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>
---
hw/xive.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++
include/xive.h | 7 ++++---
2 files changed, 52 insertions(+), 3 deletions(-)
diff --git a/hw/xive.c b/hw/xive.c
index 395cb44..5a31828 100644
--- a/hw/xive.c
+++ b/hw/xive.c
@@ -2323,6 +2323,53 @@ static int64_t opal_xive_reset(uint64_t version)
return OPAL_SUCCESS;
}
+static int64_t opal_xive_get_irq_info(uint32_t girq,
+ uint64_t *out_flags,
+ uint64_t *out_eoi_page,
+ uint64_t *out_trig_page,
+ uint32_t *out_esb_shift,
+ uint32_t *out_src_chip)
+{
+ struct irq_source *is = irq_find_source(girq);
+ struct xive_src *s = container_of(is, struct xive_src, is);
+ uint32_t idx;
+ uint64_t mm_base;
+ uint64_t eoi_page = 0, trig_page = 0;
+
+ if (xive_mode != XIVE_MODE_EXPL)
+ return OPAL_WRONG_STATE;
+ if (is == NULL || out_flags == NULL)
+ return OPAL_PARAMETER;
+ assert(is->ops == &xive_irq_source_ops);
+
+ *out_flags = s->flags;
+ idx = girq - s->esb_base;
+
+ if (out_esb_shift)
+ *out_esb_shift = s->esb_shift;
+
+ mm_base = (uint64_t)s->esb_mmio + (1ull << s->esb_shift) * idx;
+
+ if (s->flags & XIVE_SRC_EOI_PAGE1) {
+ uint64_t p1off = 1ull << (s->esb_shift - 1);
+ eoi_page = mm_base + p1off;
+ trig_page = mm_base;
+ } else {
+ eoi_page = mm_base;
+ if (!(s->flags & XIVE_SRC_STORE_EOI))
+ trig_page = mm_base;
+ }
+
+ if (out_eoi_page)
+ *out_eoi_page = eoi_page;
+ if (out_trig_page)
+ *out_trig_page = trig_page;
+ if (out_src_chip)
+ *out_src_chip = GIRQ_TO_CHIP(girq);
+
+ return OPAL_SUCCESS;
+}
+
void init_xive(void)
{
struct dt_node *np;
@@ -2363,5 +2410,6 @@ void init_xive(void)
/* Register XIVE exploitation calls */
opal_register(OPAL_XIVE_RESET, opal_xive_reset, 1);
+ opal_register(OPAL_XIVE_GET_IRQ_INFO, opal_xive_get_irq_info, 6);
}
diff --git a/include/xive.h b/include/xive.h
index e35da6d..ba48601 100644
--- a/include/xive.h
+++ b/include/xive.h
@@ -374,9 +374,10 @@ uint32_t xive_alloc_ipi_irqs(uint32_t chip_id, uint32_t count, uint32_t align);
uint64_t xive_get_notify_port(uint32_t chip_id, uint32_t ent);
uint32_t xive_get_notify_base(uint32_t girq);
-#define XIVE_SRC_EOI_PAGE1 0x00000001 /* EOI and trig. separate */
-#define XIVE_SRC_STORE_EOI 0x00000002 /* Store EOI (auto trigger) */
-#define XIVE_SRC_LSI 0x00000004 /* No Q bit, no retrigger */
+/* Old definitions, superseeded by OPAL_* ones */
+#define XIVE_SRC_EOI_PAGE1 OPAL_XIVE_IRQ_TRIGGER_PAGE
+#define XIVE_SRC_STORE_EOI OPAL_XIVE_IRQ_STORE_EOI
+#define XIVE_SRC_LSI OPAL_XIVE_IRQ_LSI
struct irq_source_ops;
void xive_register_hw_source(uint32_t base, uint32_t count, uint32_t shift,
--
2.7.4
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