[Skiboot] [PATCH] core/fast-reboot.c: Add sreset opal call
npiggin at gmail.com
Mon Nov 21 19:01:42 AEDT 2016
On Tue, 15 Nov 2016 13:49:13 +1100
Alistair Popple <alistair at popple.id.au> wrote:
> Sending a NMI to other CPUs regardless of their current state requires
> a way to reset them. POWER hardware has a method of directly injecting
> resets via direct thread control, however this only works if the
> thread is not active (eg. in a sleep or nap state).
> Resetting an active thread can be performed either via forcing the
> threads to an inactive state (as fast reboot does) or by ramming an
> instruction sequence that simulates an sreset. This patch implements
> the latter as forcing a thread to the inactive state is not ideal for
> debug purposes as the threads loose state.
For reference, this is part of an effort to make NMI interrupts usable
on powerpc platforms, and use that in Linux for crash dumping and debugging.
> Signed-off-by: Alistair Popple <alistair at popple.id.au>
> Currently active threads on the currently executing core cannot be
> sreset as a thread cannot ram other threads on the same core. This
> means the caller will need to reset these threads to make the call
> from a different core.
Great stuff. Do you see any way to lift this restriction in future,
or do we need to make this part of the API? We should be able to make
the Linux powernv platform code have NMI'ed cores bounce the NMI
back to our sibling threads without too much work or changes to the
platform independent NMI code.
So this should be fine, but we should ensure the API has a way to
communicate this type of failure (that requires an NMI bounce from
another core, as opposed to some other failure). Did you have any
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