[Skiboot] [RFC PATCH 0/7] Enable VAS

Sukadev Bhattiprolu sukadev at linux.vnet.ibm.com
Sat Nov 12 03:56:48 AEDT 2016

Power9 introduces a hardware subsystem referred to as the Virtual
Accelerator Switchboard (VAS). VAS allows kernel subsystems and user
space processes to directly access the Nest Accelerator (NX) engines
which implement compression and encryption algorithms in the hardware.

NX has been in Power processors since Power7+, but access to the NX
engines was through the 'icswx' instruction which is only available
to the kernel/hypervisor. Starting with Power9, access to the NX
engines is provided to both kernel and user space processes through

The switchboard (i.e VAS) multiplexes accesses between "receivers" and
"senders", where the "receivers" are typically the NX engines and
"senders" are the kernel subsystems and user processors that wish to
access the receivers (NX engines).  Once a sender is "connected" to 
a receiver through the switchboard, the sender can submit compression/
encryptions requests to the hardware using the new (in PowerISA 3.0)
"copy" and "paste" instructions.

In the initial OPAL and PowerNV kernel patchsets, the "senders" can
only be kernel subsystems (i.e NX-842 driver). A follow-on patch set
will allow senders to be user-space processes.

This OPAL patch set initializes the VAS registers and makes the VAS
hardware available to the NX-842 driver in the kernel. It also provides
some interfaces that the NX-842 subsystem in OPAL needs to initialize
the NX hardware in Power9.

This is an RFC patch set that has been tested in a Simics Power9
environment using a modified NX-842 kernel driver and a compression
self-test module from Power8. The corresponding kernel patchset for
VAS support will be posted shortly to the linuxppc-devel list. OPAL
and kernel patchsets for NX-842 driver will be posted separately. All
four patchsets are needed to effectively use VAS/NX in Power9.

Thanks to Haren Myneni for the NX-842 modifications and help with
testing, Ben Herrenschmidt for the interface to retrieve an IPI
trigger port, Ben, Michael Ellerman and Michael Neuling for input
on working with the hardware.

Benjamin Herrenschmidt (1):
  xive: Add helper to retrieve an IPI trigger port

Sukadev Bhattiprolu (6):
  VAS: Define macros needed by VAS
  VAS: Initialize the basic VAS internal registers
  VAS: Define vas_get_hvwc_mmio_bar interface
  VAS: Define vas_get_wcbs_bar interface
  VAS: Define OPAL_VAS_READ_FIR interface

 core/Makefile.inc  |    2 +-
 core/init.c        |    4 +
 core/vas.c         |  385 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 hw/xive.c          |   19 +++
 include/chip.h     |    1 +
 include/opal-api.h |    4 +-
 include/vas.h      |  158 +++++++++++++++++++++
 include/xive.h     |    5 +
 8 files changed, 576 insertions(+), 2 deletions(-)
 create mode 100644 core/vas.c
 create mode 100644 include/vas.h

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