[Skiboot] [PATCH v6 12/16] hw/phb3: Support PHB slot

Benjamin Herrenschmidt benh at kernel.crashing.org
Fri Jun 24 21:10:27 AEST 2016

Hi Gavin !

I was debugging a problem in simics with the IPR, which ended up being
caused by this change in PHB3. Now I'm sure it's a bug in the SIMICS IPR
model and I've already signaled it, however I don't understand why you
did that change:

> -               /* Switch to generic link poll state machine */
> -               return phb3_start_link_poll(p);
> +               pci_slot_set_state(slot,
> +                       PHB3_SLOT_PFRESET_DEASSERT_DELAY);
> +               return pci_slot_set_sm_timeout(slot, secs_to_tb(1));
> +               pci_slot_set_state(slot, PHB3_SLOT_HRESET_START);
> +               return slot->ops.hreset(slot);
>         default:

Basically, the old code, after a fundamental reset, would go straight
to polling for a link.

Your new code does a hot reset, then polls for the link.

That isn't incorrect per-se, but it seems to me to be completely
unnecessary... a fundamental reset is a superset of a hot reset.

Also even if we can only PERST below the RC, switches are supposed
to forward a PERST downstream as a hot reset anyway.


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