[Skiboot] [PATCH 06/28] power9: Add example device tree for phb4

Michael Neuling mikey at neuling.org
Thu Jul 7 15:55:40 AEST 2016


On Thu, 2016-07-07 at 11:49 +1000, Benjamin Herrenschmidt wrote:
> Signed-off-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>

Acked-by: Michael Neuling <mikey at neuling.org>

> ---
>  doc/device-tree/examples/power9-phb4.dts | 156 +++++++++++++++++++++++++++++++
>  1 file changed, 156 insertions(+)
>  create mode 100644 doc/device-tree/examples/power9-phb4.dts
> 
> diff --git a/doc/device-tree/examples/power9-phb4.dts b/doc/device-tree/examples/power9-phb4.dts
> new file mode 100644
> index 0000000..46e8999
> --- /dev/null
> +++ b/doc/device-tree/examples/power9-phb4.dts
> @@ -0,0 +1,156 @@
> +/dts-v1/;
> +
> +/ {
> +	compatible = "ibm,powernv";
> +	model = "BML";
> +	#size-cells = <0x2>;
> +	#address-cells = <0x2>;
> +
> +	chosen {
> +		linux,pci-assign-all-buses = <0x1>;
> +		linux,pci-probe-only = <0x0>;
> +		linux,platform = <0x100>;
> +		ibm,architecture-vec-5 = <0x0 0x800000>;
> +		linux,initrd-start = <0x0 0x28000000>;
> +		linux,initrd-end = <0x0 0x30000000>;
> +	};
> +
> +	memory at 0 {
> +		reg = <0x0 0x0 0x0 0x80000000>;
> +		ibm,chip-id = <0x0>;
> +		device_type = "memory";
> +	};
> +
> +	cpus {
> +		#size-cells = <0x0>;
> +		#address-cells = <0x1>;
> +
> +		PowerPC,POWER9 at 0 {
> +			device_type = "cpu";
> +			status = "okay";
> +			ibm,chip-id = <0x0>;
> +			ibm,pir = <0x0>;
> +			timebase-frequency = <0x1c4fecc0>;
> +			clock-frequency = <0xe27f6600>;
> +			ibm,segment-page-sizes = <0xc 0x0 0x1 0xc 0x0 0x10 0x110 0x1 0x10 0x1 0x14 0x111 0x1 0x14 0x2 0x18 0x100 0x1 0x18 0x0 0x22 0x120 0x1 0x22 0x3>;
> +			ibm,processor-segment-sizes = <0x1c 0xffffffff 0xffffffff 0xffffffff>;
> +			ibm,pa-features = <0x600f63f 0xc70080c0>;
> +			i-cache-size = <0x8000>;
> +			d-cache-size = <0x8000>;
> +			i-cache-line-size = <0x80>;
> +			d-cache-line-size = <0x80>;
> +			ibm,slb-size = <0x20>;
> +			ibm,vmx = <0x2>;
> +			reg = <0x0>;
> +//			ibm,ppc-interrupt-server#s = <0x0 0x01>;
> +			ibm,ppc-interrupt-server#s = <0x0>;
> +		};
> +	};
> +
> +	xscom at 603fc00000000 {
> +		compatible = "ibm,xscom", "ibm,power9-xscom";
> +		ibm,chip-id = <0x0>;
> +		#size-cells = <0x1>;
> +		#address-cells = <0x1>;
> +		reg = <0x603fc 0x0 0x8 0x0>;
> +
> +
> +		/* PE#0 supports only one stack */
> +		pbcq at 4010c00 {
> +			ibm,pec-index = <0x0>;
> +			reg = <0x4010c00 0x100 0xd010800 0x200>;
> +			compatible = "ibm,power9-pbcq";
> +
> +			/* child address is stack number */
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			stack at 0 {
> +			      /* Stack number */
> +			      reg = <0>;
> +			      /* Chip-scope PHB index */
> +			      ibm,phb-index = <0x0>;
> +			      compatible = "ibm,power9-phb-stack";
> +			      /* ibm,lane-eq = < ????? >; */
> +			      status = "okay";
> +			};
> +		};
> +		/* PE#1 supports two stacks */
> +
> +		pbcq at 4011000 {
> +			ibm,pec-index = <0x1>;
> +			reg = <0x4011000 0x100 0xe010800 0x200>;
> +			compatible = "ibm,power9-pbcq";
> +
> +			/* child address is stack number */
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			stack at 0 {
> +			      /* Stack number */
> +			      reg = <0>;
> +			      /* Chip-scope PHB index */
> +			      ibm,phb-index = <0x1>;
> +			      compatible = "ibm,power9-phb-stack";
> +			      /* ibm,lane-eq = < ????? >; */
> +			      status = "disabled";
> +			};
> +			stack at 1 {
> +			      /* Stack number */
> +			      reg = <1>;
> +			      /* Chip-scope PHB index */
> +			      ibm,phb-index = <0x2>;
> +			      compatible = "ibm,power9-phb-stack";
> +			      /* ibm,lane-eq = < ????? >; */
> +			      status = "disabled";
> +			};
> +		};
> +
> +		/* PE#2 supports three stacks */
> +		pbcq at 4011400 {
> +			ibm,pec-index = <0x2>;
> +			reg = <0x4011400 0x100 0xf010800 0x200>;
> +			compatible = "ibm,power9-pbcq";
> +
> +			/* child address is stack number */
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			stack at 0 {
> +			      /* Stack number */
> +			      reg = <0>;
> +			      /* Chip-scope PHB index */
> +			      ibm,phb-index = <0x3>;
> +			      compatible = "ibm,power9-phb-stack";
> +			      /* ibm,lane-eq = < ????? >; */
> +			      status = "disabled";
> +			};
> +			stack at 1 {
> +			      /* Stack number */
> +			      reg = <1>;
> +			      /* Chip-scope PHB index */
> +			      ibm,phb-index = <0x4>;
> +			      compatible = "ibm,power9-phb-stack";
> +			      /* ibm,lane-eq = < ????? >; */
> +			      status = "disabled";
> +			};
> +			stack at 2 {
> +			      /* Stack number */
> +			      reg = <2>;
> +			      /* Chip-scope PHB index */
> +			      ibm,phb-index = <0x5>;
> +			      compatible = "ibm,power9-phb-stack";
> +			      /* ibm,lane-eq = < ????? >; */
> +			      status = "disabled";
> +			};
> +		};
> +
> +		chiptod at 40000 {
> +			primary;
> +			reg = <0x40000 0x34>;
> +			compatible = "ibm,power-chiptod", "ibm,power9-chiptod";
> +		};
> +
> +		xive at 5013400 {
> +			reg = <0x5013000 0x300>;
> +			compatible = "ibm,power9-xive-x";
> +		};
> +	};
> +};


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