[Skiboot] [PATCH v2 11/28] interrupts: Use a #interrupt-cells of 2 for XICS interrupts
Benjamin Herrenschmidt
benh at kernel.crashing.org
Thu Jul 7 11:55:51 AEST 2016
This is more compliant with PAPR, it will also allow us to
use the second cell for other attributes on P9.
Signed-off-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>
---
v2. Still missed something in the NPU map
core/interrupts.c | 2 +-
core/pci.c | 16 ++++++++++------
doc/device-tree.txt | 1 -
hdata/test/p8-840-spira.dt | 6 ------
hdata/test/p81-811.spira.dt | 20 --------------------
hw/npu.c | 32 +++++++++++++-------------------
hw/p7ioc-phb.c | 6 +++++-
hw/p7ioc.c | 3 ++-
hw/phb3.c | 6 +++++-
hw/phb4.c | 6 +++++-
hw/psi.c | 2 +-
11 files changed, 42 insertions(+), 58 deletions(-)
diff --git a/core/interrupts.c b/core/interrupts.c
index db39267..7109fae 100644
--- a/core/interrupts.c
+++ b/core/interrupts.c
@@ -143,7 +143,7 @@ struct dt_node *add_ics_node(void)
dt_add_property_strings(ics, "compatible", "IBM,ppc-xics",
"IBM,opal-xics");
dt_add_property_cells(ics, "#address-cells", 0);
- dt_add_property_cells(ics, "#interrupt-cells", 1);
+ dt_add_property_cells(ics, "#interrupt-cells", 2);
dt_add_property_string(ics, "device_type",
"PowerPC-Interrupt-Source-Controller");
dt_add_property(ics, "interrupt-controller", NULL, 0);
diff --git a/core/pci.c b/core/pci.c
index 7ba5169..cbaea35 100644
--- a/core/pci.c
+++ b/core/pci.c
@@ -1124,11 +1124,17 @@ void pci_std_swizzle_irq_map(struct dt_node *np,
uint8_t swizzle)
{
uint32_t *map, *p;
- int dev, irq;
- size_t map_size;
+ int dev, irq, esize, edevcount;
+ size_t map_size, isize;
+
+ /* Some emulated setups don't use standard interrupts
+ * representation
+ */
+ if (lstate->int_size == 0)
+ return;
/* Size in bytes of a target interrupt */
- size_t isize = lstate->int_size * sizeof(uint32_t);
+ isize = lstate->int_size * sizeof(uint32_t);
/* Calculate the size of a map entry:
*
@@ -1139,7 +1145,7 @@ void pci_std_swizzle_irq_map(struct dt_node *np,
*
* Assumption: PIC address is 0-size
*/
- int esize = 3 + 1 + 1 + lstate->int_size;
+ esize = 3 + 1 + 1 + lstate->int_size;
/* Number of map "device" entries
*
@@ -1150,8 +1156,6 @@ void pci_std_swizzle_irq_map(struct dt_node *np,
* If we have been passed a host bridge (pd == NULL) we also
* do a simple per-pin map
*/
- int edevcount;
-
if (!pd || (pd->dev_type == PCIE_TYPE_ROOT_PORT ||
pd->dev_type == PCIE_TYPE_SWITCH_DNPORT)) {
edevcount = 1;
diff --git a/doc/device-tree.txt b/doc/device-tree.txt
index a231d53..742ff43 100644
--- a/doc/device-tree.txt
+++ b/doc/device-tree.txt
@@ -305,7 +305,6 @@
compatible = "IBM,ppc-xicp", "IBM,power8-icp";
interrupt-controller;
#address-cells = <0x0>;
- #interrupt-cells = <0x1>;
device_type = "PowerPC-External-Interrupt-Presentation";
/*
diff --git a/hdata/test/p8-840-spira.dt b/hdata/test/p8-840-spira.dt
index 8746bea..324b616 100644
--- a/hdata/test/p8-840-spira.dt
+++ b/hdata/test/p8-840-spira.dt
@@ -548,7 +548,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8002d00000000000000010000003ffff8002e00000000000000010000003ffff
8002f0000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80060000
@@ -560,7 +559,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8006500000000000000010000003ffff8006600000000000000010000003ffff
800670000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80068000
@@ -572,7 +570,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8006d00000000000000010000003ffff8006e00000000000000010000003ffff
8006f0000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80130000
@@ -584,7 +581,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8013500000000000000010000003ffff8013600000000000000010000003ffff
801370000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80168000
@@ -596,7 +592,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8016d00000000000000010000003ffff8016e00000000000000010000003ffff
8016f0000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80170000
@@ -608,7 +603,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8017500000000000000010000003ffff8017600000000000000010000003ffff
801770000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: ipl-params
diff --git a/hdata/test/p81-811.spira.dt b/hdata/test/p81-811.spira.dt
index 068152c..5b792b4 100644
--- a/hdata/test/p81-811.spira.dt
+++ b/hdata/test/p81-811.spira.dt
@@ -1453,7 +1453,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8002500000000000000010000003ffff8002600000000000000010000003ffff
800270000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80030000
@@ -1465,7 +1464,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8003500000000000000010000003ffff8003600000000000000010000003ffff
800370000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80060000
@@ -1477,7 +1475,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8006500000000000000010000003ffff8006600000000000000010000003ffff
800670000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80068000
@@ -1489,7 +1486,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8006d00000000000000010000003ffff8006e00000000000000010000003ffff
8006f0000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80070000
@@ -1501,7 +1497,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8007500000000000000010000003ffff8007600000000000000010000003ffff
800770000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80128000
@@ -1513,7 +1508,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8012d00000000000000010000003ffff8012e00000000000000010000003ffff
8012f0000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80130000
@@ -1525,7 +1519,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8013500000000000000010000003ffff8013600000000000000010000003ffff
801370000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80160000
@@ -1537,7 +1530,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8016500000000000000010000003ffff8016600000000000000010000003ffff
801670000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80168000
@@ -1549,7 +1541,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8016d00000000000000010000003ffff8016e00000000000000010000003ffff
8016f0000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80170000
@@ -1561,7 +1552,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8017500000000000000010000003ffff8017600000000000000010000003ffff
801770000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80828000
@@ -1573,7 +1563,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8082d00000000000000010000003ffff8082e00000000000000010000003ffff
8082f0000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80830000
@@ -1585,7 +1574,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8083500000000000000010000003ffff8083600000000000000010000003ffff
808370000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80860000
@@ -1597,7 +1585,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8086500000000000000010000003ffff8086600000000000000010000003ffff
808670000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80868000
@@ -1609,7 +1596,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8086d00000000000000010000003ffff8086e00000000000000010000003ffff
8086f0000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80870000
@@ -1621,7 +1607,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8087500000000000000010000003ffff8087600000000000000010000003ffff
808770000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80920000
@@ -1633,7 +1618,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8092500000000000000010000003ffff8092600000000000000010000003ffff
809270000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80928000
@@ -1645,7 +1629,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8092d00000000000000010000003ffff8092e00000000000000010000003ffff
8092f0000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80930000
@@ -1657,7 +1640,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8093500000000000000010000003ffff8093600000000000000010000003ffff
809370000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80968000
@@ -1669,7 +1651,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8096d00000000000000010000003ffff8096e00000000000000010000003ffff
8096f0000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: interrupt-controller at 3ffff80970000
@@ -1681,7 +1662,6 @@ prop: ibm,enabled-idle-states size: 24 val: 6e617000666173742d736c65657000727677
0010000003ffff8097500000000000000010000003ffff8097600000000000000010000003ffff
809770000000000000001000
prop: #address-cells size: 4 val: 00000000
- prop: #interrupt-cells size: 4 val: 00000001
prop: device_type size: 40 val: 506f77657250432d45787465726e616c2d496e746572727570742d50726573656e746174696f
6e00
node: ipl-params
diff --git a/hw/npu.c b/hw/npu.c
index f535f8a..43ec46c 100644
--- a/hw/npu.c
+++ b/hw/npu.c
@@ -1739,10 +1739,17 @@ static void npu_add_phb_properties(struct npu *p)
uint32_t icsp = get_ics_phandle();
uint64_t tkill, mm_base, mm_size;
uint32_t base_lsi = p->base_lsi;
- uint32_t map[] = { 0x0, 0x0, 0x0, 0x1, icsp, base_lsi,
- 0x0, 0x0, 0x0, 0x2, icsp, base_lsi + 1,
- 0x800, 0x0, 0x0, 0x1, icsp, base_lsi + 2,
- 0x800, 0x0, 0x0, 0x2, icsp, base_lsi + 3 };
+ uint32_t map[] = {
+ /* Dev 0 INT#A (used by fn0) */
+ 0x0000, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL0, 1,
+ /* Dev 0 INT#B (used by fn1) */
+ 0x0000, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL1, 1,
+ /* Dev 1 INT#A (used by fn0) */
+ 0x0800, 0x0, 0x0, 0x1, icsp, base_lsi + NPU_LSI_INT_DL2, 1,
+ /* Dev 1 INT#B (used by fn1) */
+ 0x0800, 0x0, 0x0, 0x2, icsp, base_lsi + NPU_LSI_INT_DL3, 1,
+ };
+ /* Mask is bus, device and INT# */
uint32_t mask[] = {0xf800, 0x0, 0x0, 0x7};
char slotbuf[32];
@@ -1759,21 +1766,8 @@ static void npu_add_phb_properties(struct npu *p)
dt_add_property_cells(np, "clock-frequency", 0x200, 0);
dt_add_property_cells(np, "interrupt-parent", icsp);
- /* DLPL Interrupts */
- p->phb.lstate.int_size = 1;
- p->phb.lstate.int_val[0][0] = p->base_lsi + NPU_LSI_INT_DL0;
- p->phb.lstate.int_val[1][0] = p->base_lsi + NPU_LSI_INT_DL1;
- p->phb.lstate.int_val[2][0] = p->base_lsi + NPU_LSI_INT_DL2;
- p->phb.lstate.int_val[3][0] = p->base_lsi + NPU_LSI_INT_DL3;
- p->phb.lstate.int_parent[0] = icsp;
- p->phb.lstate.int_parent[1] = icsp;
- p->phb.lstate.int_parent[2] = icsp;
- p->phb.lstate.int_parent[3] = icsp;
-
- /* Due to the way the emulated PCI devices are structured in
- * the device tree the core PCI layer doesn't do this for
- * us. Besides the swizzling wouldn't suit our needs even if it
- * did. */
+ /* DLPL Interrupts, we don't use the standard swizzle */
+ p->phb.lstate.int_size = 0;
dt_add_property(np, "interrupt-map", map, sizeof(map));
dt_add_property(np, "interrupt-map-mask", mask, sizeof(mask));
diff --git a/hw/p7ioc-phb.c b/hw/p7ioc-phb.c
index 96554c8..6f5a6ab 100644
--- a/hw/p7ioc-phb.c
+++ b/hw/p7ioc-phb.c
@@ -2617,11 +2617,15 @@ static void p7ioc_pcie_add_node(struct p7ioc_phb *p)
* PCI code based on the content of this structure:
*/
lsibase = p->buid_lsi << 4;
- p->phb.lstate.int_size = 1;
+ p->phb.lstate.int_size = 2;
p->phb.lstate.int_val[0][0] = lsibase + PHB_LSI_PCIE_INTA;
+ p->phb.lstate.int_val[0][1] = 1;
p->phb.lstate.int_val[1][0] = lsibase + PHB_LSI_PCIE_INTB;
+ p->phb.lstate.int_val[1][1] = 1;
p->phb.lstate.int_val[2][0] = lsibase + PHB_LSI_PCIE_INTC;
+ p->phb.lstate.int_val[2][1] = 1;
p->phb.lstate.int_val[3][0] = lsibase + PHB_LSI_PCIE_INTD;
+ p->phb.lstate.int_val[3][1] = 1;
p->phb.lstate.int_parent[0] = icsp;
p->phb.lstate.int_parent[1] = icsp;
p->phb.lstate.int_parent[2] = icsp;
diff --git a/hw/p7ioc.c b/hw/p7ioc.c
index 85a0a51..4480b8e 100644
--- a/hw/p7ioc.c
+++ b/hw/p7ioc.c
@@ -629,7 +629,8 @@ static void p7ioc_create_hub(struct dt_node *np)
dt_add_property_cells(np, "ibm,opal-hubid", 0, id);
/* XXX Fixme: how many RGC interrupts ? */
- dt_add_property_cells(np, "interrupts", ioc->rgc_buid << 4);
+ dt_add_property_cells(np, "interrupt-parent", get_ics_phandle());
+ dt_add_property_cells(np, "interrupts", ioc->rgc_buid << 4, 1);
dt_add_property_cells(np, "interrupt-base", ioc->rgc_buid << 4);
/* XXX What about ibm,opal-mmio-real ? */
diff --git a/hw/phb3.c b/hw/phb3.c
index df23c43..1d271a2 100644
--- a/hw/phb3.c
+++ b/hw/phb3.c
@@ -4248,11 +4248,15 @@ static void phb3_add_properties(struct phb3 *p)
* PCI code based on the content of this structure:
*/
lsibase = p->base_lsi;
- p->phb.lstate.int_size = 1;
+ p->phb.lstate.int_size = 2;
p->phb.lstate.int_val[0][0] = lsibase + PHB3_LSI_PCIE_INTA;
+ p->phb.lstate.int_val[0][1] = 1;
p->phb.lstate.int_val[1][0] = lsibase + PHB3_LSI_PCIE_INTB;
+ p->phb.lstate.int_val[1][1] = 1;
p->phb.lstate.int_val[2][0] = lsibase + PHB3_LSI_PCIE_INTC;
+ p->phb.lstate.int_val[2][1] = 1;
p->phb.lstate.int_val[3][0] = lsibase + PHB3_LSI_PCIE_INTD;
+ p->phb.lstate.int_val[3][1] = 1;
p->phb.lstate.int_parent[0] = icsp;
p->phb.lstate.int_parent[1] = icsp;
p->phb.lstate.int_parent[2] = icsp;
diff --git a/hw/phb4.c b/hw/phb4.c
index 31b340f..cf5742b 100644
--- a/hw/phb4.c
+++ b/hw/phb4.c
@@ -2923,11 +2923,15 @@ static void phb4_add_properties(struct phb4 *p)
* PCI code based on the content of this structure:
*/
lsibase = p->base_lsi;
- p->phb.lstate.int_size = 1;
+ p->phb.lstate.int_size = 2;
p->phb.lstate.int_val[0][0] = lsibase + PHB4_LSI_PCIE_INTA;
+ p->phb.lstate.int_val[0][1] = 1;
p->phb.lstate.int_val[1][0] = lsibase + PHB4_LSI_PCIE_INTB;
+ p->phb.lstate.int_val[1][1] = 1;
p->phb.lstate.int_val[2][0] = lsibase + PHB4_LSI_PCIE_INTC;
+ p->phb.lstate.int_val[2][1] = 1;
p->phb.lstate.int_val[3][0] = lsibase + PHB4_LSI_PCIE_INTD;
+ p->phb.lstate.int_val[3][1] = 1;
p->phb.lstate.int_parent[0] = icsp;
p->phb.lstate.int_parent[1] = icsp;
p->phb.lstate.int_parent[2] = icsp;
diff --git a/hw/psi.c b/hw/psi.c
index 0823ec8..46e059a 100644
--- a/hw/psi.c
+++ b/hw/psi.c
@@ -783,7 +783,7 @@ static void psi_create_mm_dtnode(struct psi *psi)
dt_add_property_strings(np, "compatible", "ibm,psi");
}
dt_add_property_cells(np, "interrupt-parent", get_ics_phandle());
- dt_add_property_cells(np, "interrupts", psi->interrupt);
+ dt_add_property_cells(np, "interrupts", psi->interrupt, 1);
dt_add_property_cells(np, "ibm,chip-id", psi->chip_id);
}
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