[Skiboot] [PATCH 05/33] POWER9: Add XSCOM related definitions
Michael Neuling
mikey at neuling.org
Wed Jul 6 17:16:47 AEST 2016
On Sat, 2016-06-25 at 08:47 +1000, Benjamin Herrenschmidt wrote:
> Macros for EP/EX/EC accesses and some register definitions
>
> Signed-off-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>
Acked-by: Michael Neuling <mikey at neuling.org>
> ---
> include/xscom-p9-regs.h | 12 ++++++++++++
> include/xscom.h | 33 +++++++++++++++++++++++++++++++--
> 2 files changed, 43 insertions(+), 2 deletions(-)
> create mode 100644 include/xscom-p9-regs.h
>
> diff --git a/include/xscom-p9-regs.h b/include/xscom-p9-regs.h
> new file mode 100644
> index 0000000..04ec557
> --- /dev/null
> +++ b/include/xscom-p9-regs.h
> @@ -0,0 +1,12 @@
> +#ifndef __XSCOM_P9_REGS_H__
> +#define __XSCOM_P9_REGS_H__
> +
> +/* EX (core pair) registers, use XSCOM_ADDR_P9_EX to access */
> +#define P9X_EX_NCU_STATUS_REG 0x1100f
> +#define P9X_EX_NCU_SPEC_BAR 0x11010
> +#define P9X_EX_NCU_SPEC_BAR_ENABLE PPC_BIT(0)
> +#define P9X_EX_NCU_SPEC_BAR_256K PPC_BIT(1)
> +#define P9X_EX_NCU_SPEC_BAR_ADDRMSK 0x0fffffffffffc000u
> ll /* naturally aligned */
> +#define P9X_EX_NCU_DARN_BAR 0x11011
> +
> +#endif /* __XSCOM_P9_REGS_H__ */
> diff --git a/include/xscom.h b/include/xscom.h
> index 933af6a..8f7749f 100644
> --- a/include/xscom.h
> +++ b/include/xscom.h
> @@ -37,8 +37,11 @@
> * appended and flag set
> * 0b1000.0000.0000.0000.0000.00NN.NCCC.MMMM
> * N=Node, C=Chip, M=Memory Channel
> - * Processor EX/Core chiplet = PIR >> 3 with flag set
> + * Processor EX/Core chiplet = PIR >> 3 with flag set.
> + * On P8:
> * 0b0100.0000.0000.0000.0000.00NN.NCCC.PPPP
> + * On P9:
> + * 0b0100.0000.0000.0000.0000.0NNN.CCCP.PPPP
> * N=Node, C=Chip, P=Processor core
> */
>
> @@ -108,7 +111,7 @@
> (((_r) << 10) | ((_s) << 6) | (_o))
>
> /*
> - * Additional useful definitions
> + * Additional useful definitions for P8
> */
> #define P8_EX_PCB_SLAVE_BASE 0x100F0000
>
> @@ -118,6 +121,30 @@
> #define XSCOM_ADDR_P8_EX(core, addr) \
> ((((core) & 0xF) << 24) | (addr))
>
> +/*
> + * Additional useful definitions for P9
> + */
> +
> +/* An EQ is a quad (also named an EP) */
> +#define XSCOM_ADDR_P9_EP(core, addr) \
> + (((((core) & 0x1c) + 0x40) << 22) | (addr))
> +#define XSCOM_ADDR_P9_EP_SLAVE(core, addr) \
> + XSCOM_ADDR_P9_EP(core, (addr) | 0xf0000)
> +
> +/* An EX is a pair of cores. They are accessed via their corresponding
> EQs
> + * with bit 0x400 indicating which of the 2 EX to address
> + */
> +#define XSCOM_ADDR_P9_EX(core, addr) \
> + (XSCOM_ADDR_P9_EP(core, addr | (((core) & 2) << 9)))
> +
> +/* An EC is an individual core and has its own XSCOM addressing */
> +#define XSCOM_ADDR_P9_EC(core, addr) \
> + (((((core) & 0x1F) + 0x20) << 24) | (addr))
> +#define XSCOM_ADDR_P9_EC_SLAVE(core, addr) \
> + XSCOM_ADDR_P9_EC(core, (addr) | 0xf0000)
> +
> +/************* XXXX Move these P8 only registers elswhere !!!
> ****************/
> +
> /* Per core power mgt registers */
> #define PM_OHA_MODE_REG 0x1002000D
> #define L2_FIR_ACTION1 0x10012807
> @@ -154,6 +181,8 @@
> #define EX_PM_IDLE_ST_HIST_PM_STATE_MASK PPC_BITMASK(0, 2)
> #define EX_PM_IDLE_ST_HIST_PM_STATE_LSH PPC_BITLSHIFT(2)
>
> +/***********************************************************************
> ****/
> +
> /* Definitions relating to indirect XSCOMs shared with centaur */
> #define XSCOM_ADDR_IND_FLAG PPC_BIT(0)
> #define XSCOM_ADDR_IND_ADDR PPC_BITMASK(12,31)
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