[Skiboot] [PATCH 10/15] psi: On p9, create an interrupt-map for routing PSI interrupts
Benjamin Herrenschmidt
benh at kernel.crashing.org
Tue Aug 9 16:38:14 AEST 2016
This will provide the global IRQ numbers for all 16 PSI inputs (though
we don't really care about 0 here). We can then express them in the
device-tree as relative to the PSI bridge. Among others, that allows
us to express the external interrupt and the LPC interrupt using a
fixed numbering scheme.
The example device-tree is updated to route them all to the LPC0
input which corresponds to what the LPC code does at the moment.
Signed-off-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>
---
v2. Fix the map format, it was broken in several ways
Fix map
---
doc/device-tree/examples/power9-phb4.dts | 28 +++++++++++++++++++++++++++-
hw/psi.c | 15 +++++++++++++++
2 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/doc/device-tree/examples/power9-phb4.dts b/doc/device-tree/examples/power9-phb4.dts
index 8da1cbc..a845a86 100644
--- a/doc/device-tree/examples/power9-phb4.dts
+++ b/doc/device-tree/examples/power9-phb4.dts
@@ -153,9 +153,18 @@
compatible = "ibm,power9-xive-x";
};
- psihb at 5012900 {
+ PSI_X0 : psihb at 5012900 {
reg = <0x5012900 0x100>;
compatible = "ibm,power9-psihb-x", "ibm,psihb-x";
+
+ /* This acts as an interrupt remapper for the 16
+ * interrupts coming into the PSI HB.
+ * OPAL will generate the corresponding interrupt-map
+ * property with the final XIVE numbers
+ */
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #interrupt-map-mask = < 0xff >;
};
};
@@ -185,6 +194,23 @@
ranges = < 3 0 0xf0000000 0x10000000 /* FW space */
0 0 0xe0000000 0x10000000 /* MEM space */
1 0 0xd0010000 0x00010000 /* IO space */ >;
+
+ /* We currently only support level interrupts on the LPC,
+ * we use 1 cell.
+ */
+ #interrupt-cells = <1>;
+
+ /* Route the LPC interrupts to one of the 4 supported
+ * PSI interrupt inputs [7...10].
+ */
+ interrupt-map = < 0 0 4 &PSI_X0 7
+ 0 0 10 &PSI_X0 7>;
+ interrupt-map-mask = < 0 0 0xff >;
+
+ /*
+ * Devices on the LPC bus go here
+ */
+
serial at i3f8 {
compatible = "ns16550";
reg = < 1 0x3f8 0x10 >;
diff --git a/hw/psi.c b/hw/psi.c
index 465b74e..900886a 100644
--- a/hw/psi.c
+++ b/hw/psi.c
@@ -848,6 +848,20 @@ static void psi_activate_phb(struct psi *psi)
#endif
}
+static void psi_create_p9_int_map(struct psi *psi, struct dt_node *np)
+{
+ uint32_t map[P9_PSI_NUM_IRQS][4];
+ int i;
+
+ for (i = 0; i < P9_PSI_NUM_IRQS; i++) {
+ map[i][0] = i;
+ map[i][1] = get_ics_phandle();
+ map[i][2] = psi->interrupt + i;
+ map[i][3] = 1;
+ }
+ dt_add_property(np, "interrupt-map", map, sizeof(map));
+}
+
static void psi_create_mm_dtnode(struct psi *psi)
{
struct dt_node *np;
@@ -871,6 +885,7 @@ static void psi_create_mm_dtnode(struct psi *psi)
case proc_gen_p9:
dt_add_property_strings(np, "compatible", "ibm,psi",
"ibm,power9-psi");
+ psi_create_p9_int_map(psi, np);
break;
default:
dt_add_property_strings(np, "compatible", "ibm,psi");
--
2.7.4
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