[Skiboot] [PATCH v2] core/cpu.c: Add OPAL call to setup Nest MMU

[Alistair Popple]

POWER9 has an off core MMU called the Nest MMU which allows other
units within a chip to perform address translations. The context and
setup for translations is handled by the requesting agents, however
the Nest MMU does need to know where in system memory the page tables
are located.

This patch adds a call to setup the Nest MMU page table pointer on a
per-chip basis.

Signed-off-by: Alistair Popple <alistair at popple.id.au>
---
 core/cpu.c                              | 29 +++++++++++++++++++++++++++++
 doc/opal-api/opal-nmmu-set-ptcr-127.txt | 22 ++++++++++++++++++++++
 include/opal-api.h                      |  3 ++-
 3 files changed, 53 insertions(+), 1 deletion(-)
 create mode 100644 doc/opal-api/opal-nmmu-set-ptcr-127.txt

diff --git a/core/cpu.c b/core/cpu.c
index f33ac48..70e3a7a 100644
--- a/core/cpu.c
+++ b/core/cpu.c
@@ -30,6 +30,7 @@
 #include <timebase.h>
 #include <ccan/str/str.h>
 #include <ccan/container_of/container_of.h>
+#include <xscom.h>
 
 /* The cpu_threads array is static and indexed by PIR in
  * order to speed up lookup from asm entry points
@@ -894,3 +895,31 @@ static int64_t opal_reinit_cpus(uint64_t flags)
 	return rc;
 }
 opal_call(OPAL_REINIT_CPUS, opal_reinit_cpus, 1);
+
+/*
+ * Setup the the Nest MMU PTCR register for all chips in the system or
+ * the specified chip id.
+ *
+ * The PTCR value may be overwritten so long as all users have been
+ * quiesced. If it is set to an invalid memory address the system will
+ * checkstop if anything attempts to use it.
+ */
+#define NMMU_CFG_XLAT_CTL_PTCR 0x5012c4b
+static int64_t opal_nmmu_set_ptcr(uint64_t chip_id, uint64_t ptcr)
+{
+	struct proc_chip *chip;
+	int64_t rc = OPAL_PARAMETER;
+
+	if (chip_id == -1ULL)
+		for_each_chip(chip)
+			rc = xscom_write(chip->id, NMMU_CFG_XLAT_CTL_PTCR, ptcr);
+	else {
+		if (!(chip = get_chip(chip_id)))
+			return OPAL_PARAMETER;
+
+		rc = xscom_write(chip->id, NMMU_CFG_XLAT_CTL_PTCR, ptcr);
+	}
+
+	return rc;
+}
+opal_call(OPAL_NMMU_SET_PTCR, opal_nmmu_set_ptcr, 2);
diff --git a/doc/opal-api/opal-nmmu-set-ptcr-127.txt b/doc/opal-api/opal-nmmu-set-ptcr-127.txt
new file mode 100644
index 0000000..eac13f3
--- /dev/null
+++ b/doc/opal-api/opal-nmmu-set-ptcr-127.txt
@@ -0,0 +1,22 @@
+OPAL_NMMU_SET_PTCR
+-------------------
+
+#define OPAL_NMMU_SET_PTCR			127
+
+int64 opal_nmmu_set_ptcr(uint64 chip_id, uint64_t ptcr)
+
+Arguments:
+
+  uint64 chip_id
+    either the chip id containing the nest mmu who's ptcr should be set
+    or alternatively -1ULL to indicate all nest mmu ptcr's should be set to
+    the same value.
+  uint64 ptcr
+    ptcr value pointing to either the radix tables or hash tables.
+
+This OPAL call sets up the Nest MMU by pointing it at the radix page
+table base or the hash page table base (HTABORG).
+
+Return Values:
+OPAL_SUCCESS: the power down was updated successful
+OPAL_PARAMETER: a parameter was incorrect
diff --git a/include/opal-api.h b/include/opal-api.h
index c86244b..e82210c 100644
--- a/include/opal-api.h
+++ b/include/opal-api.h
@@ -172,7 +172,8 @@
 #define OPAL_INT_EOI				124
 #define OPAL_INT_SET_MFRR			125
 #define OPAL_PCI_TCE_KILL			126
-#define OPAL_LAST				126
+#define OPAL_NMMU_SET_PTCR			127
+#define OPAL_LAST				127
 
 /* Device tree flags */
 
-- 
2.1.4