[Skiboot] [PATCH 06/12] lpc: Add P9 LPC interrupts support

[Stewart Smith]

Benjamin Herrenschmidt <benh at kernel.crashing.org> writes:
> On Mon, 2016-08-08 at 17:45 +1000, Stewart Smith wrote:
>> 
>> > 
>> > diff --git a/hw/psi.c b/hw/psi.c
>> > index 08dc589..16f88c2 100644
>> > --- a/hw/psi.c
>> > +++ b/hw/psi.c
>> > @@ -38,7 +38,7 @@ static LIST_HEAD(psis);
>> >  static u64 psi_link_timer;
>> >  static u64 psi_link_timeout;
>> >  static bool psi_link_poll_active;
>> > -static bool psi_ext_irq_policy = EXTERNAL_IRQ_POLICY_LINUX;
>> > +static bool psi_ext_irq_policy = EXTERNAL_IRQ_POLICY_SKIBOOT;
>> > 
>> >  static void psi_activate_phb(struct psi *psi);
>> > 
>> 
>> Is this change intentional?
>> 
>> Reverting this hunk fixes tuleta, while garrison is still rather
>> broken.
>
> Weird... that could mean that something on Tuleta is whacking the
> external interrupt ... or maybe it's dangling ?
>
>> The following patch also helped fix Tuleta, or at least seems to
>> harden things up a bit - I'm not sure we want to be depending on
>> uninitialized data being zero, and extra asserts seem to be useful.
>
> Ugh ?
>
> I have a hard dependency on BSS being 0 all over the place...

On a second look, all chip structures ar zalloc()d, so they should all
be zero no matter what anyway 

So, I'm wrong and I have no idea why.

-- 
Stewart Smith
OPAL Architect, IBM.