[Skiboot] [PATCH 3/4] libflash: enable 4b mode on BMC SPI flash
Joel Stanley
joel at jms.id.au
Wed Nov 25 16:42:38 AEDT 2015
We already support larger parts on the host flash, but the BMC
has always had a 16MB part, so we did not need to enable the 4b
addressing mode.
This enables the 4b addressing mode when the flash is larger than 16MB.
Signed-off-by: Joel Stanley <joel at jms.id.au>
---
hw/ast-bmc/ast-sf-ctrl.c | 10 +++++++++-
include/ast.h | 1 +
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/hw/ast-bmc/ast-sf-ctrl.c b/hw/ast-bmc/ast-sf-ctrl.c
index 0ca32da0d791..d18031a77aea 100644
--- a/hw/ast-bmc/ast-sf-ctrl.c
+++ b/hw/ast-bmc/ast-sf-ctrl.c
@@ -152,8 +152,11 @@ static int ast_sf_cmd_wr(struct spi_flash_ctrl *ctrl, uint8_t cmd,
static int ast_sf_set_4b(struct spi_flash_ctrl *ctrl, bool enable)
{
struct ast_sf_ctrl *ct = container_of(ctrl, struct ast_sf_ctrl, ops);
+ uint32_t ce_ctrl = 0;
- if (ct->type != AST_SF_TYPE_PNOR)
+ if (ct->type == AST_SF_TYPE_BMC && ct->ops.finfo->size > 0x1000000)
+ ce_ctrl = ast_ahb_readl(BMC_SPI_FCTL_CE_CTRL);
+ else if (ct->type != AST_SF_TYPE_PNOR)
return enable ? FLASH_ERR_4B_NOT_SUPPORTED : 0;
/*
@@ -164,15 +167,20 @@ static int ast_sf_set_4b(struct spi_flash_ctrl *ctrl, bool enable)
if (enable) {
ct->ctl_val |= 0x2000;
ct->ctl_read_val |= 0x2000;
+ ce_ctrl |= 0x1;
} else {
ct->ctl_val &= ~0x2000;
ct->ctl_read_val &= ~0x2000;
+ ce_ctrl &= ~0x1;
}
ct->mode_4b = enable;
/* Update read mode */
ast_ahb_writel(ct->ctl_read_val, ct->ctl_reg);
+ if (ce_ctrl)
+ ast_ahb_writel(ce_ctrl, BMC_SPI_FCTL_CE_CTRL);
+
return 0;
}
diff --git a/include/ast.h b/include/ast.h
index 58adb6c9c5d0..c7bf0cb3a7fd 100644
--- a/include/ast.h
+++ b/include/ast.h
@@ -22,6 +22,7 @@
/* SPI Flash controller #1 (BMC) */
#define BMC_SPI_FCTL_BASE 0x1E620000
+#define BMC_SPI_FCTL_CE_CTRL (BMC_SPI_FCTL_BASE + 0x04)
#define BMC_SPI_FCTL_CTRL (BMC_SPI_FCTL_BASE + 0x10)
#define BMC_SPI_FREAD_TIMING (BMC_SPI_FCTL_BASE + 0x94)
#define BMC_FLASH_BASE 0x20000000
--
2.6.2
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