[Skiboot] [RFC PATCH] Use two VSX registers to do initial copy of skiboot

Benjamin Herrenschmidt benh at kernel.crashing.org
Fri May 22 14:35:38 AEST 2015


On Fri, 2015-05-22 at 14:15 +1000, Michael Neuling wrote:
> So on this... If we can assume that memory is zero, we can save a lot of
> cycles with not having to zero out some stuff (console, cpu stacks and
> trace buffer in particular).  I can get the number of instructions
> required to boot in sim down from 15M to 600K (ie 20x faster).  
> 
> benh, can we use the ipl-params/ipl-params/cec-major-type property to
> mark "cold" boots as having zeroed memory, and hence skip some of these?
> I'd like to do this at run time, rather than compile time .

I don't know whether we have any guarantee from hostboot that we have
zeroed memory. In fact we don't ... HB itself has left remains behind.

We'll need a specific type to represent a sim env. with initial zeroed
memory.

Another bunch of things to consider:

 - Remove useless clearing unconditionally. For example, stacks. We only
need to clear the cpu_thread structure at the bottom and the last backlink.

 - Make clearing more efficient. Stewart gave it a good try but what
about using dcbz ?

 - Link skiboot at 0x3000_0000 so when pre-loaded there, it doesn't need
to relocate itself (skip not just copy but also relocation phase).

Cheers,
Ben. 



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