[Skiboot] [PATCH 1/2] exceptions: Remove deprecated exception patching stuff

Benjamin Herrenschmidt benh at kernel.crashing.org
Fri Mar 27 16:11:39 AEDT 2015


Linux no longer calls it, it never worked on LE and generally
speaking never really did anything useful anyway.

Signed-off-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>
---
 asm/head.S        | 125 -------------------------
 core/exceptions.c | 268 +++---------------------------------------------------
 2 files changed, 14 insertions(+), 379 deletions(-)

diff --git a/asm/head.S b/asm/head.S
index d368236..740adbf 100644
--- a/asm/head.S
+++ b/asm/head.S
@@ -871,128 +871,3 @@ start_kernel_secondary:
 	mtctr	%r3
 	mfspr	%r3,SPR_PIR
 	bctr
-
-	.global exc_primary_start
-exc_primary_start:
-	mtspr	SPR_HSPRG1,%r1
-	mfspr	%r1,SPR_CFAR
-0:	b	.
-	.global exc_primary_end
-exc_primary_end:
-
-	.global exc_primary_patch_branch
-exc_primary_patch_branch:
-	.long	0b - exc_primary_start
-
-	.global exc_secondary_start
-exc_secondary_start:
-	mtspr	SPR_CFAR,%r1
-	mfspr	%r1,SPR_PIR
-0:	GET_STACK(%r1,%r1)
-	stdu	%r1,-STACK_FRAMESIZE(%r1)
-	std	%r3,STACK_GPR3(%r1)
-	mfspr	%r3,SPR_HSPRG1
-	std	%r3,STACK_GPR1(%r1)
-	mfspr	%r3,SPR_CFAR
-	std	%r3,STACK_CFAR(%r1)
-1:	mfspr	%r3,SPR_SRR0
-	std	%r3,STACK_SRR0(%r1)
-2:	mfspr	%r3,SPR_SRR1
-	std	%r3,STACK_SRR1(%r1)
-	mflr	%r3
-	std	%r3,STACK_LR(%r1)
-	LOAD_IMM32(%r3,exception_entry_common - __head);
-	addis	%r3,%r3,SKIBOOT_BASE at h
-	mtlr	%r3
-3:	li	%r3,0
-	blrl	/* XXX Use a BH=01 variant to avoid link stack problems */
-	ld	%r3,STACK_LR(%r1)
-	mtlr	%r3
-	ld	%r3,STACK_SRR0(%r1)
-4:	mtspr	SPR_SRR0,%r3
-	ld	%r3,STACK_SRR1(%r1)
-5:	mtspr	SPR_SRR1,%r3
-	ld	%r3,STACK_GPR3(%r1)
-	ld	%r1,STACK_GPR1(%r1)
-6:	rfid
-	.global exc_secondary_end
-exc_secondary_end:
-
-	.global exc_secondary_patch_stack
-exc_secondary_patch_stack:
-	.long	0b - exc_secondary_start
-	.global exc_secondary_patch_mfsrr0
-exc_secondary_patch_mfsrr0:
-	.long	1b - exc_secondary_start
-	.global exc_secondary_patch_mfsrr1
-exc_secondary_patch_mfsrr1:
-	.long	2b - exc_secondary_start
-	.global exc_secondary_patch_type
-exc_secondary_patch_type:
-	.long	3b - exc_secondary_start
-	.global exc_secondary_patch_mtsrr0
-exc_secondary_patch_mtsrr0:
-	.long	4b - exc_secondary_start
-	.global exc_secondary_patch_mtsrr1
-exc_secondary_patch_mtsrr1:
-	.long	5b - exc_secondary_start
-	.global exc_secondary_patch_rfid
-exc_secondary_patch_rfid:
-	.long	6b - exc_secondary_start
-
-	/* The rest of the exception entry code */
-exception_entry_common:
-	std	%r3,STACK_TYPE(%r1)
-
-	/* We save the exception return LR in the stack-locals area */
-	mflr	%r3
-	std	%r3,STACK_LOCALS(%r1)
-
-	/* Save more stuff */
-	std	%r0,STACK_GPR0(%r1)
-	std	%r2,STACK_GPR2(%r1)
-	std	%r4,STACK_GPR4(%r1)
-	std	%r5,STACK_GPR5(%r1)
-	std	%r6,STACK_GPR6(%r1)
-	std	%r7,STACK_GPR7(%r1)
-	std	%r8,STACK_GPR8(%r1)
-	std	%r9,STACK_GPR9(%r1)
-	std	%r10,STACK_GPR10(%r1)
-	std	%r11,STACK_GPR11(%r1)
-	std	%r12,STACK_GPR12(%r1)
-	std	%r13,STACK_GPR13(%r1)
-	mfcr	%r3
-	stw	%r3,STACK_CR(%r1)
-	mfctr	%r3
-	std	%r3,STACK_CTR(%r1)
-
-	GET_CPU()
-
-	LOAD_IMM64(%r2, SKIBOOT_BASE)
-	addis	%r2,%r2,(__toc_start - __head)@ha
-	addi	%r2,%r2,(__toc_start - __head)@l
-
-	mr	%r3,%r1
-	bl	exception_entry
-
-	ld	%r3,STACK_CTR(%r1)
-	lwz	%r4,STACK_CR(%r1)
-	mtctr	%r3
-	mtcr	%r4
-
-	ld	%r0,STACK_GPR0(%r1)
-	ld	%r2,STACK_GPR2(%r1)
-	ld	%r4,STACK_GPR4(%r1)
-	ld	%r5,STACK_GPR5(%r1)
-	ld	%r6,STACK_GPR6(%r1)
-	ld	%r7,STACK_GPR7(%r1)
-	ld	%r8,STACK_GPR8(%r1)
-	ld	%r9,STACK_GPR9(%r1)
-	ld	%r10,STACK_GPR10(%r1)
-	ld	%r11,STACK_GPR11(%r1)
-	ld	%r12,STACK_GPR12(%r1)
-	ld	%r13,STACK_GPR13(%r1)
-
-	ld	%r3,STACK_LOCALS(%r1)
-	mtlr	%r3
-	blr
diff --git a/core/exceptions.c b/core/exceptions.c
index 552123a..83efa36 100644
--- a/core/exceptions.c
+++ b/core/exceptions.c
@@ -21,48 +21,16 @@
 #include <processor.h>
 #include <cpu.h>
 
-extern uint8_t exc_primary_start;
-extern uint8_t exc_primary_end;
-
-extern uint32_t exc_primary_patch_branch;
-
-extern uint8_t exc_secondary_start;
-extern uint8_t exc_secondary_end;
-
-extern uint32_t exc_secondary_patch_stack;
-extern uint32_t exc_secondary_patch_mfsrr0;
-extern uint32_t exc_secondary_patch_mfsrr1;
-extern uint32_t exc_secondary_patch_type;
-extern uint32_t exc_secondary_patch_mtsrr0;
-extern uint32_t exc_secondary_patch_mtsrr1;
-extern uint32_t exc_secondary_patch_rfid;
-
-static struct lock hmi_lock = LOCK_UNLOCKED;
-
 #define REG		"%016llx"
 #define REGS_PER_LINE	4
-#define LAST_VOLATILE	13
 
-static void dump_regs(struct stack_frame *stack, uint64_t hmer)
+static void dump_regs(struct stack_frame *stack)
 {
-	int i;
-	uint64_t tfmr;
+	unsigned int i;
 
-	if (hmer & SPR_HMER_MALFUNCTION_ALERT)
-		printf("HMI: malfunction Alert\n");
-	if (hmer & SPR_HMER_HYP_RESOURCE_ERR)
-		printf("HMI: Hypervisor resource error.\n");
-	if (hmer & SPR_HMER_TFAC_ERROR) {
-		tfmr = mfspr(SPR_TFMR);
-		printf("HMI: TFAC error: SPRN_TFMR = 0x%016llx\n", tfmr);
-	}
-	if (hmer & SPR_HMER_TFMR_PARITY_ERROR) {
-		tfmr = mfspr(SPR_TFMR);
-		printf("HMI: TFMR parity error: SPRN_TFMR = 0x%016llx\n", tfmr);
-	}
-	printf("TRAP: %04llx\n", stack->type);
-	printf("SRR0: "REG" SRR1: "REG"\n", stack->srr0, stack->srr1);
-	printf("CFAR: "REG" LR: "REG" CTR: "REG"\n",
+	printf("SRR0 : "REG" SRR1 : "REG"\n", stack->srr0, stack->srr1);
+	printf("HSRR0: "REG" HSRR1: "REG"\n", stack->srr0, stack->srr1);
+	printf("CFAR : "REG" LR   : "REG" CTR: "REG"\n",
 		stack->cfar, stack->lr, stack->ctr);
 	printf("  CR: %08x  XER: %08x\n", stack->cr, stack->xer);
 
@@ -70,235 +38,27 @@ static void dump_regs(struct stack_frame *stack, uint64_t hmer)
 		if ((i % REGS_PER_LINE) == 0)
 			printf("\nGPR%02d: ", i);
 		printf(REG " ", stack->gpr[i]);
-		if (i == LAST_VOLATILE)
-			break;
 	}
 	printf("\n");
 }
 
-/*
- * HMER register layout:
- * +===+==========+============================+========+===================+
- * |Bit|Name      |Description                 |PowerKVM|Action             |
- * |   |          |                            |HMI     |                   |
- * |   |          |                            |enabled |                   |
- * |   |          |                            |for this|                   |
- * |   |          |                            |bit ?   |                   |
- * +===+==========+============================+========+===================+
- * |0  |malfunctio|A processor core in the     |Yes     |Raise attn from    |
- * |   |n_allert  |system has checkstopped     |        |sapphire resulting |
- * |   |          |(failed recovery) and has   |        |xstop              |
- * |   |          |requested a CP Sparing      |        |                   |
- * |   |          |to occur. This is           |        |                   |
- * |   |          |broadcasted to every        |        |                   |
- * |   |          |processor in the system     |        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |1  |Reserved  |reserved                    |n/a     |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |2  |proc_recv_|Processor recovery occurred |Yes     |Log message and    |
- * |   |done      |error-bit in fir not masked |        |continue working.  |
- * |   |          |(see bit 11)                |        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |3  |proc_recv_|Processor went through      |Yes     |Log message and    |
- * |   |error_mask|recovery for an error which |        |continue working.  |
- * |   |ed        |is actually masked for      |        |                   |
- * |   |          |reporting                   |        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |4  |          |Timer facility experienced  |Yes     |Raise attn from    |
- * |   |tfac_error|an error.                   |        |sapphire resulting |
- * |   |          |TB, DEC, HDEC, PURR or SPURR|        |xstop              |
- * |   |          |may be corrupted (details in|        |                   |
- * |   |          |TFMR)                       |        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |5  |          |TFMR SPR itself is          |Yes     |Raise attn from    |
- * |   |tfmr_parit|corrupted.                  |        |sapphire resulting |
- * |   |y_error   |Entire timing facility may  |        |xstop              |
- * |   |          |be compromised.             |        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |6  |ha_overflo| UPS (Uniterrupted Power    |No      |N/A                |
- * |   |w_warning |System) Overflow indication |        |                   |
- * |   |          |indicating that the UPS     |        |                   |
- * |   |          |DirtyAddrTable has          |        |                   |
- * |   |          |reached a limit where it    |        |                   |
- * |   |          |requires PHYP unload support|        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |7  |reserved  |reserved                    |n/a     |n/a                |
- * |---+----------+----------------------------+--------+-------------------|
- * |8  |xscom_fail|An XSCOM operation caused by|No      |We handle it by    |
- * |   |          |a cache inhibited load/store|        |manually reading   |
- * |   |          |from this thread failed. A  |        |HMER register.     |
- * |   |          |trap register is            |        |                   |
- * |   |          |available.                  |        |                   |
- * |   |          |                            |        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |9  |xscom_done|An XSCOM operation caused by|No      |We handle it by    |
- * |   |          |a cache inhibited load/store|        |manually reading   |
- * |   |          |from this thread completed. |        |HMER register.     |
- * |   |          |If hypervisor               |        |                   |
- * |   |          |intends to use this bit, it |        |                   |
- * |   |          |is responsible for clearing |        |                   |
- * |   |          |it before performing the    |        |                   |
- * |   |          |xscom operation.            |        |                   |
- * |   |          |NOTE: this bit should always|        |                   |
- * |   |          |be masked in HMEER          |        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |10 |reserved  |reserved                    |n/a     |n/a                |
- * |---+----------+----------------------------+--------+-------------------|
- * |11 |proc_recv_|Processor recovery occurred |y       |Log message and    |
- * |   |again     |again before bit2 or bit3   |        |continue working.  |
- * |   |          |was cleared                 |        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |12-|reserved  |was temperature sensor      |n/a     |n/a                |
- * |15 |          |passed the critical point on|        |                   |
- * |   |          |the way up                  |        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |16 |          |SCOM has set a reserved FIR |No      |n/a                |
- * |   |scom_fir_h|bit to cause recovery       |        |                   |
- * |   |m         |                            |        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |17 |trig_fir_h|Debug trigger has set a     |No      |n/a                |
- * |   |mi        |reserved FIR bit to cause   |        |                   |
- * |   |          |recovery                    |        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |18 |reserved  |reserved                    |n/a     |n/a                |
- * |---+----------+----------------------------+--------+-------------------|
- * |19 |reserved  |reserved                    |n/a     |n/a                |
- * |---+----------+----------------------------+--------+-------------------|
- * |20 |hyp_resour|A hypervisor resource error |y       |Raise attn from    |
- * |   |ce_err    |occurred: data parity error |        |sapphire resulting |
- * |   |          |on, SPRC0:3; SPR_Modereg or |        |xstop.             |
- * |   |          |HMEER.                      |        |                   |
- * |   |          |Note: this bit will cause an|        |                   |
- * |   |          |check_stop when (HV=1, PR=0 |        |                   |
- * |   |          |and EE=0)                   |        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |21-|          |if bit 8 is active, the     |No      |We handle it by    |
- * |23 |xscom_stat|reason will be detailed in  |        |Manually reading   |
- * |   |us        |these bits. see chapter 11.1|        |HMER register.     |
- * |   |          |This bits are information   |        |                   |
- * |   |          |only and always masked      |        |                   |
- * |   |          |(mask = '0')                |        |                   |
- * |   |          |If hypervisor intends to use|        |                   |
- * |   |          |this bit, it is responsible |        |                   |
- * |   |          |for clearing it before      |        |                   |
- * |   |          |performing the xscom        |        |                   |
- * |   |          |operation.                  |        |                   |
- * |---+----------+----------------------------+--------+-------------------|
- * |24-|Not       |Not implemented             |n/a     |n/a                |
- * |63 |implemente|                            |        |                   |
- * |   |d         |                            |        |                   |
- * +-- +----------+----------------------------+--------+-------------------+
- *
- * Above HMER bits can be enabled/disabled by modifying
- * SPR_HMEER_HMI_ENABLE_MASK #define in include/processor.h
- * If you modify support for any of the bits listed above, please make sure
- * you change the above table to refelct that.
- *
- * NOTE: Per Dave Larson, never enable 8,9,21-23
- */
-
-/* make compiler happy with a prototype */
-void handle_hmi(struct stack_frame *stack);
-
-void handle_hmi(struct stack_frame *stack)
-{
-	uint64_t orig_hmer;
-	int recover;
-
-	orig_hmer = mfspr(SPR_HMER);
-	recover = handle_hmi_exception(orig_hmer, NULL);
-	if (recover)
-		return;
-
-	/*
-	 * Raise attn to crash.
-	 *
-	 * We get HMI on all threads at the same time. Using locks to avoid
-	 * printf messages jumbled up.
-	 */
-	lock(&hmi_lock);
-	dump_regs(stack, orig_hmer);
-	/* Should we unlock? We are going down anyway. */
-	unlock(&hmi_lock);
-	assert(false);
-}
-
 /* Called from head.S, thus no prototype */
-void exception_entry(struct stack_frame *stack);
+void exception_entry(struct stack_frame *stack) __noreturn;
 
 void exception_entry(struct stack_frame *stack)
 {
-	switch(stack->type) {
-	case STACK_ENTRY_HMI:
-		handle_hmi(stack);
-		/* XXX TODO : Implement machine check */
-		break;
-	case STACK_ENTRY_SOFTPATCH:
-		/* XXX TODO : Implement softpatch ? */
-		break;
-	}
+	prerror("Unexpected exception %llx !\n", stack->type);
+	dump_regs(stack);
+	backtrace();
+	_abort();
 }
 
-static int64_t patch_exception(uint64_t vector, uint64_t glue, bool hv)
-{
-	uint64_t iaddr;
-
-	/* Copy over primary exception handler */
-	memcpy((void *)vector, &exc_primary_start,
-	       &exc_primary_end - &exc_primary_start);
-
-	/* Patch branch instruction in primary handler */
-	iaddr = vector + exc_primary_patch_branch;
-	*(uint32_t *)iaddr |= (glue - iaddr) & 0x03fffffc;
-
-	/* Copy over secondary exception handler */
-	memcpy((void *)glue, &exc_secondary_start,
-	       &exc_secondary_end - &exc_secondary_start);
-
-	/* Patch-in the vector number */
-	*(uint32_t *)(glue + exc_secondary_patch_type) |= vector;
-
-	BUILD_ASSERT(STACK_SIZE < 0x8000);
-	BUILD_ASSERT(!(CPU_STACKS_BASE & 0xffff));
-
-	/* Standard exception ? All done */
-	if (!hv)
-		goto flush;
-
-	/* HV exception, change the SRR's to HSRRs and rfid to hrfid
-	 *
-	 * The magic is that mfspr/mtspr of SRR can be turned into the
-	 * equivalent HSRR version by OR'ing 0x4800. For rfid to hrfid
-	 * we OR 0x200.
-	 */
-	*(uint32_t *)(glue + exc_secondary_patch_mfsrr0) |= 0x4800;
-	*(uint32_t *)(glue + exc_secondary_patch_mfsrr1) |= 0x4800;
-	*(uint32_t *)(glue + exc_secondary_patch_mtsrr0) |= 0x4800;
-	*(uint32_t *)(glue + exc_secondary_patch_mtsrr1) |= 0x4800;
-	*(uint32_t *)(glue + exc_secondary_patch_rfid) |= 0x200;
-
- flush:
-	/* On P7 and later all we need is : */
-	sync_icache();
-
-	return OPAL_SUCCESS;
-}
-
-static int64_t opal_register_exc_handler(uint64_t opal_exception,
+static int64_t opal_register_exc_handler(uint64_t opal_exception __unused,
 					 uint64_t handler_address __unused,
-					 uint64_t glue_cache_line)
+					 uint64_t glue_cache_line __unused)
 {
-	switch(opal_exception) {
-	case OPAL_HYPERVISOR_MAINTENANCE_HANDLER:
-		return patch_exception(0xe60, glue_cache_line, true);
-#if 0 /* We let Linux handle softpatch */
-	case OPAL_SOFTPATCH_HANDLER:
-		return patch_exception(0x1500, glue_cache_line, true);
-#endif
-	default:
-		break;
-	}
-	return OPAL_PARAMETER;
+	/* This interface is deprecated */
+	return OPAL_UNSUPPORTED;
 }
 opal_call(OPAL_REGISTER_OPAL_EXCEPTION_HANDLER, opal_register_exc_handler, 3);
 




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